SC16IS752 Datasheet, PDF (15/59 Pages) NXP Semiconductors – Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support

NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I²C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
7.5.1 Interrupt mode operation
In Interrupt mode (if any bit of IER[3:0] is 1) the host is informed of the status of the
receiver and transmitter by an interrupt signal, IRQ. Therefore, it is not necessary to
continuously poll the Line Status Register (LSR) to see if any interrupt needs to be
serviced. Figure 8 shows Interrupt mode operation.
HOST
read IIR
IRQ
IIR
IER
1111
THR
RHR
Fig 8. Interrupt mode operation
002aab042
7.5.2 Polled mode operation
In Polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the Line Status Register (LSR). This mode is an alternative to the FIFO
Interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU. Figure 9 shows FIFO Polled
mode operation.
HOST
read LSR
Fig 9. FIFO Polled mode operation
LSR
IER
0000
THR
RHR
002aab043
SC16IS752_SC16IS762_7
Product data sheet
Rev. 07 — 19 May 2008
© NXP B.V. 2008. All rights reserved.
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