PCAL6408A Datasheet, PDF (15/48 Pages) NXP Semiconductors – Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander with interrupt output, reset, and configuration registers

NXP Semiconductors
PCAL6408A
Low-voltage translating, 8-bit I²C-bus/SMBus I/O expander
8. Bus transactions
The PCAL6408A is an I²C-bus slave device. Data is exchanged between the master and
PCAL6408A through write and read commands using I²C-bus. The two communication
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Write commands
Data is transmitted to the PCAL6408A by sending the device address and setting the
Least Significant Bit (LSB) to a logic 0 (see Figure 5 for device address). The command
byte is sent after the address and determines which register receives the data that follows
the command byte. There is no limitation on the number of data bytes sent in one write
transmission.
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S
0
1
0
0
0
0
AD
DR
0
A
0
0
0
0
0
0
0
1
A
data to port
DATA 1
STOP
condition
AP
START condition
write to port
data out from port
R/W acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
t_v(Q)
DATA 1 VALID
002aaf825
Fig 8. Write to Output port register
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S
0
1
0
0
0
0
AD
DR
0
A
0 1/0 0
0
0 1/0 1/0 1/0 A
data to register
DATA 1
START condition
R/W acknowledge
from slave
acknowledge
from slave
Fig 9. Write to Configuration or Polarity inversion registers
STOP
condition
AP
acknowledge
from slave
002aah090
PCAL6408A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 6 December 2012
© NXP B.V. 2012. All rights reserved.
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