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LPC54102J512BD64QL Datasheet, PDF (15/90 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4/M0+ MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC
NXP Semiconductors
Table 4. Pin description …continued
Symbol
Description
LPC5410x
32-bit ARM Cortex-M4/M0+ microcontroller
PIO1_3/
ADC0_6
PIO1_4/
ADC0_7
PIO1_5/
ADC0_8
PIO1_6/
ADC0_9
B2 17 [4] PU I/O; PIO1_3/ADC0_6 — General-purpose digital input/output pin (default). ADC input
AI channel 6 if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
- R — Reserved.
I/O SPI1_SSEL2 — Slave Select 2 for SPI1.
O SCT0_OUT6 — SCT0 output 6.
I R — Reserved.
I/O SPI0_SCK — Serial clock for SPI0.
I CT32B0_CAP1 — 32-bit CT32B0 capture input 1.
A2 18 [4] PU I/O; PIO1_4/ADC0_7 — General-purpose digital input/output pin (default). ADC input
AI channel 7 if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
- R — Reserved.
I/O SPI1_SSEL1 — Slave Select 1 for SPI1.
O SCT0_OUT7 — SCT0 output 7.
I R — Reserved.
I/O SPI0_MISO — Master In Slave Out for SPI0.
O CT32B0_MAT1 — 32-bit CT32B0 match output 1.
B3 19 [4] PU I/O; PIO1_5/ADC0_8 — General-purpose digital input/output pin (default). ADC input
AI channel 8 if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
- R — Reserved.
I/O SPI1_SSEL0 — Slave Select 0 for SPI1.
I CT32B1_CAP0 — 32-bit CT32B1 capture input 0.
I R — Reserved.
O CT32B1_MAT3 — 32-bit CT32B1 match output 3.
I R — Reserved.
A5 26 [4] PU I/O; PIO1_6/ADC0_9 — General-purpose digital input/output pin (default). ADC input
AI channel 9 if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
- R — Reserved.
I/O SPI1_SCK — Serial clock for SPI1.
I CT32B1_CAP2 — 32-bit CT32B1 capture input 2.
- R — Reserved.
O CT32B1_MAT2 — 32-bit CT32B1 match output 2.
I R — Reserved.
LPC5410x
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.6 — 3 October 2016
© NXP B.V. 2016. All rights reserved.
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