ADC1113D125 Datasheet, PDF (12/41 Pages) NXP Semiconductors – Dual 11-bit ADC; serial JESD204A interface

NXP Semiconductors
ADC1113D125
ADC1113D125; serial JESD204A interface
12. SPI timing
Table 8. Characteristics
Symbol
Parameter
Serial Peripheral Interface timings
t_w(SCLK)
t_w(SCLKH)
SCLK pulse width
SCLK HIGH pulse
width
t_w(SCLKL)
SCLK LOW pulse
width
t_su
set-up time
t_h
hold time
f_clk(max)
maximum clock
frequency
Conditions
data to SCLKH
CS to SCLKH
data to SCLKH
CS to SCLKH
Min
Typ Max
Unit
40
-
-
ns
16
-
-
ns
16
-
-
ns
5
-
-
ns
5
-
-
ns
2
-
-
ns
2
-
-
ns
-
-
25
MHz
[1] Typical values measured at V_DDA = 3 V, V_DDD = 1.8 V, T_amb = 25 °C and C_L = 5 pF. Minimum and maximum
values are across the full temperature range T_amb = −40 °C to +85 °C at V_DDA = 3 V, V_DDD = 1.8 V;
V_I (INAP, INBP) − V_I (INAM,INBM) = −1 dBFS; internal reference mode; 100 Ω differential applied to serial
outputs; unless otherwise specified.
t_su
CS
t_su
t_h
t_w(SCLK)
t_w(SCLKL)
t_w(SCLKH)
t_h
SCLK
SDIO
R/W W1 W0 A12
A11
Fig 5. SPI timings
D2
D1
D0
005aaa065
ADC1113D125_2
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 23 April 2010
© NXP B.V. 2010. All rights reserved.
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