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PCF85063ATL Datasheet, PDF (11/54 Pages) NXP Semiconductors – Tiny Real-Time Clock/calendar with alarm function and I2C-bus
NXP Semiconductors
PCF85063ATL
Tiny Real-Time Clock/calendar with alarm function and I2C-bus
8.2.2.1 Alarm interrupt
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When AIE bit is disabled, pin INT remains high-impedance.
Fig 7. Interrupt scheme
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AIE: This bit activates or deactivates the generation of an interrupt when AF is asserted,
respectively.
AF: When an alarm occurs, AF is set logic 1. This bit maintains its value until overwritten
by command. To prevent one flag being overwritten while clearing another, a logic AND is
performed during a write access.
8.2.2.2 MI and HMI: minute and half minute interrupt
The minute interrupt (bit MI) and half minute interrupt (bit HMI) are pre-defined timers for
generating interrupt pulses on pin INT; see Figure 8. The timers are running in sync with
the seconds counter (see Table 19 on page 18).
When starting MI, the first interrupt will be generated after 1 second to 59 seconds. When
starting HMI, the first interrupt will be generated after 1 second to 29 seconds.
Subsequent periods do not have such a delay. The timers can be enabled independently
from one another. However, a minute interrupt enabled on top of a half minute interrupt is
not distinguishable.
PCF85063ATL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 15 April 2013
© NXP B.V. 2013. All rights reserved.
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