74HC00D Datasheet, PDF (11/16 Pages) NXP Semiconductors – Quad 2-input NAND gate

NXP Semiconductors
74HC00; 74HCT00
Quad 2-input NAND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
c
y
Z
14
8
E
A
X
H_E
vM A
pin 1 index
1
e
7
b_p
wM
A₂
A₁
Q
(A ₃)
A
θ
L_p
L
detail X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A₁
A₂
A₃
b_p
c
D ⁽¹⁾ E ⁽²⁾
e
H_E
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT402-1
MO-153
L
L_p
Q
v
w
y
Z ⁽¹⁾ θ
1
0.75 0.4
0.50 0.3
0.2 0.13
0.1
0.72
0.38
8^o
0^o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 11. Package outline SOT402-1 (TSSOP14)
74HC_HCT00
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 14 December 2011
© NXP B.V. 2011. All rights reserved.
11 of 16