SAA7160ETV2 Datasheet, PDF (10/57 Pages) NXP Semiconductors – PCI Express based audio and video bridge

NXP Semiconductors
SAA7160
PCI Express based audio and video bridge
Table 2. Description of functional pins …continued
Symbol
Pin Type^[1] Description
P2_VS_SOP
C2 ID
1. digital input signal of VIP_1, FGPI_2 or FGPI_3 for
– parallel video data mode STV YUV[9:0] bit 1
– parallel video data mode HDTV UV[9:0] bit 1
– vertical synchronization reference in 8-bit STV mode
2. digital input signal ‘start of package’ of FGPI_2 or FGPI_3 for parallel
– transport stream data of TS2
– program stream data of PS2
P2_VAL
F13 ID
digital input control signal ‘valid data’ of FGPI_2 or FGPI_3 for parallel
• transport stream data of TS2
• program stream data of PS2
If this pin is unused it is necessary to connect the pin to 3.3 V supply voltage.
P3_0
M1 ID
1. digital input signal of VIP_1, FGPI_2 or FGPI_3 for parallel video data modes
– STV YUV[7:0] bit 0
– STV YUV[9:0] bit 2
– HDTV UV[9:0] bit 2
2. digital input signal of FGPI_2 or FGPI_3 for parallel
– transport stream data of TS3[7:0] bit 0
– program stream data of PS3[7:0] bit 0
P3_1
L3 ID
1. digital input signal of VIP_1, FGPI_2 or FGPI_3 for parallel video data modes
– STV YUV[7:0] bit 1
– STV YUV[9:0] bit 3
– HDTV UV[9:0] bit 3
2. digital input signal of FGPI_2 or FGPI_3 for parallel
– transport stream data of TS3[7:0] bit 1
– program stream data of PS3[7:0] bit 1
P3_2
L2 ID
1. digital input signal of VIP_1, FGPI_2 or FGPI_3 for parallel video data modes
– STV YUV[7:0] bit 2
– STV YUV[9:0] bit 4
– HDTV UV[9:0] bit 4
2. digital input signal of FGPI_2 or FGPI_3 for parallel
– transport stream data of TS3[7:0] bit 2
– program stream data of PS3[7:0] bit 2
P3_3
L1 ID
1. digital input signal of VIP_1, FGPI_2 or FGPI_3 for parallel video data modes
– STV YUV[7:0] bit 3
– STV YUV[9:0] bit 5
– HDTV UV[9:0] bit 5
2. digital input signal of FGPI_2 or FGPI_3 for parallel
– transport stream data of TS3[7:0] bit 3
– program stream data of PS3[7:0] bit 3
SAA7160_1
Product data sheet
Rev. 01 — 25 February 2008
© NXP B.V. 2008. All rights reserved.
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