74HC590 Datasheet, PDF (10/21 Pages) NXP Semiconductors – 8-bit binary counter with output register; 3-state

NXP Semiconductors
74HC590
8-bit binary counter with output register; 3-state
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); for test circuit see Figure 15.
Symbol Parameter Conditions
t_h
hold time
CE to CPC; see Figure 13
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
t_rec
recovery time MRC to CPC; see Figure 11
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
f_max
maximum
CPC or CPR; see Figure 9
frequency
and Figure 10
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
C_PD
power
V_I = GND to V_CC
dissipation
capacitance
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max Min Max
Min
Max
0- -
0
-
0
0- -
0
-
0
0- -
0
-
0
- ns
- ns
- ns
75 28 -
95
-
110
- ns
15 7 -
19
-
22
- ns
13 6 -
16
-
19
- ns
6.6 16 - 5.2
-
4.4
- MHz
33 52 -
26
-
22
- MHz
39 61 -
31
-
26
- MHz
[4] _{- 44 -}
-
-
-
- pF
[1] t_pd is the same as t_PHL, t_PLH.
[2] t_en is the same as t_PZH and t_PZL.
[3] t_dis is the same as t_PLZ and t_PHZ.
[4] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + ∑(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in V;
N = number of inputs switching;
∑(C_L × V_CC2 × f_o) = sum of outputs.
74HC590_2
Product data sheet
Rev. 02 — 28 April 2009
© NXP B.V. 2009. All rights reserved.
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