74HC273-Q100 Datasheet, PDF (10/19 Pages) NXP Semiconductors – Octal D-type flip-flop with reset; positive-edge trigger

NXP Semiconductors
11. Waveforms
74HC273-Q100; 74HCT273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
V_I
CP input
GND
V_OH
Qn output
V_OL
1/ f_max
V_M
V_M
t_W
t_W
t _PHL
90%
V_M
10%
t_THL
t _PLH
t_TLH
001aae062
Fig 7.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the
maximum clock pulse frequency
V_I
MR input
GND
V_I
CP input
GND
V_OH
Qn output
V_OL
V_M
t_W
t_rec
t_PHL
V_M
V_M
mna464
Fig 8.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Propagation delay master reset (MR) to output (Qn), pulse width master reset (MR) and recovery time
master reset (MR) to clock (CP)
74HC_HCT273_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 June 2013
© NXP B.V. 2013. All rights reserved.
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