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PCF85133 Datasheet, PDF (1/41 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates
PCF85133
Universal LCD driver for low multiplex rates
Rev. 1 — 17 February 2009
Product data sheet
1. General description
The PCF85133 is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD) with low multiplex rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up to 80 segments and can easily
be cascaded for larger LCD applications. The PCF85133 is compatible with most
microprocessors or microcontrollers and communicates via a two-line bidirectional
I2C-bus. Communication overheads are minimized by a display RAM with
auto-incremental addressing, by hardware subaddressing and by display memory
switching (static and duplex drive modes).
2. Features
I Single-chip LCD controller and driver
I Selectable backplane drive configuration: static or 2, 3 or 4 backplane multiplexing
I Selectable display bias configuration: static, 1⁄2 or 1⁄3
I Selectable frame frequency: 82 Hz or 110 Hz
I Internal LCD bias generation with voltage-follower buffers
I 80 segment drives:
N Up to 40 7-segment numeric characters
N Up to 21 14-segment alphanumeric characters
N Any graphics of up to 320 elements
I 80 × 4 bit RAM for display data storage
I Auto-incremental display data loading across device subaddress boundaries
I Display memory bank switching in static and duplex drive modes
I Versatile blinking modes
I Independent supplies possible for LCD and logic voltages
I Wide power supply range: from 1.8 V to 5.5 V
I Wide LCD supply range for low-threshold LCDs, for guest-host LCDs and
high-threshold (automobile) twisted nematic LCDs: from 2.5 V to 6.5 V
I Low power consumption
I 400 kHz I2C-bus interface
I May be cascaded for large LCD applications (up to 5120 elements possible)
I May be cascaded with PCF8532 to gain more flexibility in the number of addressable
segments
I No external components
I Compatible with Chip-On-Glass (COG) technology
I Manufactured using silicon gate CMOS process