P89V664FA512 Datasheet, PDF (1/90 Pages) NXP Semiconductors – 8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI

P89V660/662/664
8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash
microcontroller with 512 B/1 kB/2 kB RAM, dual I²C-bus, SPI
Rev. 3.1 — 17 October 2011
Product data sheet
1. General description
The P89V660/662/664 are 80C51 microcontrollers with 16 kB/32 kB/64 kB flash and
512 B/1 kB/2 kB of data RAM. These devices are designed to be drop-in and software
compatible replacements for the P89C660/662/664 devices. Both the In-System
Programming (ISP) and In-Application Programming (IAP) boot codes are upward
compatible.
Additional features of the P89V660/662/664 devices when compared to the
P89C660/662/664 devices are the inclusion of a secondary 100 kHz byte-wide I²C-bus
interface, an SPI interface, four addition I/O pins (Port 4), and the ability to erase code
memory in 128-byte pages.
The IAP capability combined with the 128-byte page size allows for efficient use of the
code memory for non-volatile data storage.
2. Features and benefits
2.1 Principal features
 Dual 100 kHz byte-wide I²C-bus interfaces
 128-byte page erase for efficient use of code memory as non-volatile data storage
 0 MHz to 40 MHz operating frequency in 12x mode, 20 MHz in 6x mode
 16 kB/32 kB/64 kB of on-chip flash user code memory with ISP and IAP
 512 B/1 kB/2 kB RAM
 SPI (Serial Peripheral Interface) and enhanced UART
 PCA (Programmable Counter Array) with PWM and Capture/Compare functions
 Three 16-bit timers/counters
 Four 8-bit I/O ports, one 4-bit I/O port
 WatchDog Timer (WDT)
2.2 Additional features
 30 ms page erase, 150 ms block erase
 Support for 6-clock (default) or 12-clock mode selection via ISP or parallel programmer
 PLCC44 and TQFP44 packages
 Ten interrupt sources with four priority levels
 Second DPTR register
 Low EMI mode (ALE inhibit)
 Power-down mode with external interrupt wake-up