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P89V51RB2_09 Datasheet, PDF (1/80 Pages) NXP Semiconductors – 8-bit 80C51 5 V low power 16/32/64 kB flash microcontroller with 1 kB RAM | |||
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P89V51RB2/RC2/RD2
8-bit 80C51 5 V low power 16/32/64 kB ï¬ash microcontroller
with 1 kB RAM
Rev. 05 â 12 November 2009
Product data sheet
1. General description
The P89V51RB2/RC2/RD2 are 80C51 microcontrollers with 16/32/64 kB ï¬ash and
1024 B of data RAM.
A key feature of the P89V51RB2/RC2/RD2 is its X2 mode option. The design engineer
can choose to run the application with the conventional 80C51 clock rate (12 clocks per
machine cycle) or select the X2 mode (six clocks per machine cycle) to achieve twice the
throughput at the same clock frequency. Another way to beneï¬t from this feature is to keep
the same performance by reducing the clock frequency by half, thus dramatically reducing
the EMI.
The ï¬ash program memory supports both parallel programming and in serial ISP. Parallel
programming mode offers gang-programming at high speed, reducing programming costs
and time to market. ISP allows a device to be reprogrammed in the end product under
software control. The capability to ï¬eld/update the application ï¬rmware makes a wide
range of applications possible.
The P89V51RB2/RC2/RD2 is also capable of IAP, allowing the ï¬ash program memory to
be reconï¬gured even while the application is running.
2. Features
I 80C51 CPU
I 5 V operating voltage from 0 MHz to 40 MHz
I 16/32/64 kB of on-chip ï¬ash user code memory with ISP and IAP
I Supports 12-clock (default) or 6-clock mode selection via software or ISP
I SPI and enhanced UART
I PCA with PWM and capture/compare functions
I Four 8-bit I/O ports with three high-current port 1 pins (16 mA each)
I Three 16-bit timers/counters
I Programmable watchdog timer
I Eight interrupt sources with four priority levels
I Second DPTR register
I Low EMI mode (ALE inhibit)
I TTL- and CMOS-compatible logic levels
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