MMPF0200F0AEP Datasheet, PDF (1/114 Pages) NXP Semiconductors – 12 channel configurable power management integrated circuit

NXP Semiconductors
Data Sheet: Advance Information
12 channel configurable power
management integrated circuit
Document Number: MMPF0200
Rev. 6.0, 8/2016
PF0200
The PF0200 Power Management Integrated Circuit (PMIC) provides a highly
programmable/ configurable architecture, with fully integrated power devices
and minimal external components. With up to four buck converters, one boost
regulator, six linear regulators, RTC supply, and coin-cell charger, the PF0200
can provide power for a complete system, including applications processors,
memory, and system peripherals, in a wide range of applications. With on-chip
One Time Programmable (OTP) memory, the PF0200 is available in pre-
programmed standard versions, or non-programmed to support custom
programming. The PF0200 is especially suited to the i.MX 6SoloLite,
i.MX 6Solo and i.MX 6DualLite versions of the i.MX 6 family of devices and is
supported by full system level reference designs, and pre-programmed
versions of the device. This device is powered by SMARTMOS technology.
Features:
• Three to four buck converters, depending on configuration
• Boost regulator to 5.0 V output
• Six general purpose linear regulators
• Programmable output voltage, sequence, and timing
• OTP (One Time Programmable) memory for device configuration
• Coin cell charger and RTC supply
• DDR termination reference voltage
• Power control logic with processor interface and event detection
• I²C control
• Individually programmable ON, OFF, and Standby modes
POWER MANAGEMENT
EP SUFFIX (E-TYPE)
56 QFN 8X8
98ASA00405D
ES SUFFIX (WF-TYPE)
56 QFN 8X8
98ASA00589D
Applications
• Tablets
• IPTV
• Industrial Control
• Medical monitoring
• Home automation/ alarm/ energy management
PF0200
VREFDDR
SW3A/B
SW1A/B
SW2
SWBST
Control Signals
I²C Communication
VGEN1
VGEN2
VGEN3
VGEN4
LICELL
Charger
VGEN5
VGEN6
DDR Memory
SD-MMC/
NAND Mem.
SATA
HDD
WAM
GPS
MIPI
LDVS Display
i.MX6X
DDR MEMORY
INTERFACE
Processor Core
Voltages
SATA - FLASH
NAND - NOR
Interfaces
Parallel control/GPIOS
I²C Communication
Camera
GPS
MIPI
uPCIe
HDMI
USB
Ethernet
CAN
External AMP
Microphones
Speakers
Audio
Codec
Sensors
Camera
COINCELL
Main Supply
Cluster/HUD
Front USB
POD
Rear Seat
Infotaiment
Figure 1. Simplified application diagram
Rear USB
POD
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© 2016 NXP B.V.