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MKL82Z128VMC7 Datasheet, PDF (1/133 Pages) NXP Semiconductors – 72 MHz ARM® Cortex®-M0+ with 128 KB Flash and 96 KB SRAM
NXP Semiconductors
Data Sheet: Technical Data
KL82P121M72SF0
Rev. 3, 08/2016
Kinetis KL82 Microcontroller
72 MHz ARM® Cortex®-M0+ with 128 KB Flash and 96 KB
SRAM
MKL82Z128Vxx7(R)
The KL82 MCU family's high performance, encryption features
and ultra-low power capabilities extend its reach beyond
traditional mPOS pin pads and terminals into more power-
restricted payment applications, such as smartphone and tablet
attach readers, as well as those embedded in wearable
technology.
121 & 64 MAPBGA
(MC&MP)
100 & 80 & 64 LQFP
(LL&LK&LH)
14x14 x1.7 mm Pitch
8x8x1.43 mm Pitch 0.5mm 12x12x1.6 mm
The product offers:
• Hardware asymmetric cryptography – high-speed, code-
0.65 mm 5x5x1.23 mm
Pitch 0.5 mm
Pitch 0.5 mm
10x10x1.6 mm Pitch
0.5 mm
and power-efficient data authentication with support for
latest encryption protocols
• EMV®-compatible with ISO7816-3 SIM interfaces – architected for EMV compliance and supported by
an EMV Level 1 software stack
• QSPI interface to expand program memory
• Sleep mode power consumption from 2.5 µA with the SRAM content retained and RTC enabled
• Crystal-less USB OTG controller, 16-bit ADC and multiple serial communication interfaces can all
function autonomously in low-power modes with minimal CPU intervention
• FlexIO to support any standard and customized serial peripheral emulation
Core Processor
• 72 MHz ARM® Cortex®-M0+ core ( up to 96 MHz for high-
speed run)
Memories
• 128 KB program flash memory
• 96 KB SRAM
• 32 KB ROM with built-in boot loader
• 32 B backup register
• QSPI to expand program code in external high-speed serial
NOR flash memory
System
• 8-channel asynchronous enhanced DMA controller
• Watchdog
• Low-leakage wakeup unit
• Two-pin serial wire debug (SWD) programming and
debugging interface
• Micro trace buffer
• Bit manipulation engine
• Interrupt controller
Peripherals
• USB full-speed 2.0 OTG controller supporting
crystal-less operation and keeping connection
alive under ultra-low power
• Three low-power UART modules supporting
asynchronous operation in low-power modes
• Two I2C modules supporting up to 1 Mbps
• Two 16-bit SPI modules supporting up to
24Mbps
• One FlexIO module supporting emulation of
additional UART, SPI, I2C, I2S, PWM and
other serial modules, etc. up to 32 channels
• One 16-bit ADC module with high accurate
internal voltage reference and up to 16
channels
• High-speed analog comparator containing a 6-
bit DAC for programmable reference input
• One 12-bit DAC module
• Two EMVSIM modules supporting EMV L1
compatible interface
• Touch sensing interface up to 16 channels
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.