BUK7505-30A Datasheet, PDF (1/8 Pages) NXP Semiconductors – TrenchMOS transistor Standard level FET

Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
BUK7505-30A
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope using
’trench’ technology which features
very low on-state resistance. It is
intended for use in automotive and
general purpose switching
applications.
PINNING - TO220AB
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
I_D
P_tot
T_j
R_DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V_GS = 10 V
MAX.
30
75
230
175
5
PIN CONFIGURATION
SYMBOL
d
tab
1 23
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DS
V_DGR
±V_GS
I_D
I_D
I_DM
P_tot
T_stg, T_j
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
R_GS = 20 kΩ
-
T_mb = 25 ˚C
T_mb = 100 ˚C
T_mb = 25 ˚C
T_mb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
R_{th j-mb}
R_{th j-a}
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
Minimum footprint, FR4
board
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
20
75
75
400
230
175
TYP.
-
50
MAX.
0.65
-
UNIT
V
A
W
˚C
mΩ
UNIT
V
V
V
A
A
A
W
˚C
UNIT
K/W
K/W
September 1999
1
Rev 1.100