M58LT256JST Datasheet, PDF (106/108 Pages) STMicroelectronics – 256 Mbit (16 Mb × 16, multiple bank, multilevel, burst) 1.8 V supply, secure Flash memories

Command interface state tables
M58LT256JST, M58LT256JSB
Table 48.
Command interface states - lock table, next output state (continued)^{(1) (2)}
Command Input
Current CI State
Protect/CR Blank
OTP Blank Check
Setup⁽³⁾(6 Check setup Setup⁽³⁾ confirm
0h)
(BCh)
(C0h)
(CBh)
Block
Protect
Confirm
(01h)
Set CR BEFP Illegal P. E./C.
Confirm Exit⁽⁴⁾ Command Operation
(03h) (FFFFh)
(5)
Completed
OTP Busy
Ready
Program Busy
Erase Busy
Buffer Program Busy
Program/Erase Suspend
Buffer Program Suspend
Status Register
Output Unchanged Array Output Unchanged
Program Busy in Erase Suspend
Buffer Program Busy in Erase
Suspend
Program Suspend in Erase Suspend
Buffer Program Suspend in Erase
Suspend
Blank Check busy
Illegal State
Output Unchanged
1. The output state shows the type of data that appears at the outputs if the bank address is the same as the command
address. A bank can be placed in Read Array, Read Status Register, Read Electronic Signature or Read CFI mode,
depending on the command issued. Each bank remains in its last output state until a new command is issued to that bank.
The next state does not depend on the bank's output state.
2. CI = Command Interface, CR = Configuration Register, BEFP = Buffer Enhanced Factory Program, P/E. C. =
Program/Erase Controller.
3. If the P/EC is active, both cycles are ignored.
4. BEFP Exit when Block Address is different from first Block Address and data are FFFFh.
5. Illegal commands are those not defined in the command set.
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