NTE21256 Datasheet, PDF (5/6 Pages) NTE Electronics – 262,144-Bit Dynamic Random Access Memory (DRAM)

AC Characteristics (Cont’d): (T_A = 0° to +70°C, V_CC = 5V ±10%, Note 9, Note 10, Note 11
unless otherwise specified)
Parameter
Symbol Test Conditions Min Typ Max Unit
Write Command Setup Time
Write Command Hold Time
Write Command Hold Time referenced to RAS
Write Command Pulse Width
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data in Setup Time
Data in Hold Time
Data in Hold Time referenced to RAS
CAS to WE Delay
RAS to WE Delay
RMW Cycle RAS Pulse Width
RMW Cycle CAS Pulse Width
Page Mode Cycle Time
Page Mode Read–Write Cycle Time
Page Mode CAS Precharge Time
t_WCS
t_WCH
t_WCR
t_WP
t_RWL
t_CWL
t_DS
t_DH
t_DHR
t_CWD
t_RWD
t_RRW
t_CRW
t_PC
t_PRWC
t_CP
Note 20
Note 17
Note 21
Note 21
Note 17
Note 20
Note 20
Note 12
0–
45 –
120 –
45 –
45 –
45 –
0–
45 –
120 –
75 –
150 –
200 –
125 –
145 –
190 –
60 –
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
– ns
Note 9. V_IH and V_IL are reference levels to measure timing of input signals. Also, transition times
are measured between V_IH and V_IL.
Note10. An initial pause of 200µs is required after power–up followed by a minimum of eight initialization
cycles prior to normal operation.
Note 11. The time parameters specified here are valid for a transition time of t_T = 5ns for the input signals
Note12. The specification for t_RC (Min), t_RWC (Min), and page–mode cycle time (t_PC) are only used
to indicate cycle time at which proper operation over full temperature range
(0°C ≤ T_A ≤ +70°C) is assured.
Note17. t_RCD + t_CAH ≥ t_AR Min, t_RCD + t_DH ≥ t_DHR Min, t_RCD + t_WCH ≥ t_WCR Min.
Note20. t_WCS, t_CWD, and t_RWC are not restrictive operating parameters. They are included in the data
sheet as electrical characteristics only: If t_WCS ≥ t_WCS (Min), the cycle is an early write cycle
and the Data Out will remain open circuit (high impedance) throughout the entire cycle; if
t_CWD ≥ t_CWD (Min) and t_RWD ≥ t_RWD (Min) the cycle is a read–write cycle and the Data Out
will contain data read from the selected cell. If neither of the above sets of conditions is satis-
fied, the condition of the Data Out (at access time) is indeterminate.
Note21. t_DS and t_DH are referenced to the leading edge of CAS in early write cycles, and to the leading
edge of WE in delayed write of read–modify–write cycles.