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LP2997 Datasheet, PDF (9/12 Pages) National Semiconductor (TI) – DDR-II Termination Regulator
Thermal Dissipation (Continued)
top side of the board can also help. With careful layout it is
possible to reduce the θJA further than the nominal values
shown in Figure 1
Optimizing the θJA and placing the LP2997 in a section of a
board exposed to lower ambient temperature allows the part
to operate with higher power dissipation. The internal power
dissipation can be calculated by summing the three main
sources of loss: output current at VTT, either sinking or
sourcing, and quiescent current at AVIN and VDDQ. During
the active state (when shutdown is not held low) the total
internal power dissipation can be calculated from the follow-
ing equations:
Where,
PD = PAVIN + PVDDQ + PVTT
PAVIN = IAVIN * VAVIN
PVDDQ = VVDDQ * IVDDQ = VVDDQ2 x RVDDQ
To calculate the maximum power dissipation at VTT both
conditions at VTT need to be examined, sinking and sourcing
current. Although only one equation will add into the total,
VTT cannot source and sink current simultaneously.
PVTT = VVTT x ILOAD (Sinking) or
PVTT = ( VPVIN - VVTT) x ILOAD (Sourcing)
The power dissipation of the LP2997 can also be calculated
during the shutdown state. During this condition the output
VTT will tri-state, therefore that term in the power equation
will disappear as it cannot sink or source any current (leak-
age is negligible). The only losses during shutdown will be
the reduced quiescent current at AVIN and the constant
impedance that is seen at the VDDQ pin.
PD = PAVIN + PVDDQ
PAVIN = IAVIN x VAVIN
PVDDQ = VVDDQ * IVDDQ = VVDDQ2 x RVDDQ
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