LP2997 Datasheet, PDF (4/12 Pages) National Semiconductor (TI) – DDR-II Termination Regulator

Electrical Characteristics Specifications with standard typeface are for T_J = 25˚C and limits in boldface type
apply over the full Operating Temperature Range (T_J = 0˚C to +125˚C) (Note 4). Unless otherwise specified,
AVIN = 2.5V, PVIN = 1.8V, VDDQ = 1.8V. (Continued)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 3: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at θ_JA = 151.2˚ C/W
junction to ambient with no heat sink.
Note 4: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: Quiescent current defined as the current flow into AVIN.
Note 6: The maximum allowable power dissipation is a function of the maximum junction temperature, T_J(MAX), the junction to ambient thermal resistance, θ_JA, and
the ambient temperature, T_A. Exceeding the maximum allowable power dissipation will cause excessive die temperature and the regulator will go into thermal
shutdown.
Note 7: V_TT load regulation is tested by using a 10 ms current pulse and measuring V_TT.
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