LMH6572_05 Datasheet, PDF (9/12 Pages) National Semiconductor (TI) – Triple 2:1 High Speed Video Multiplexer

Application Notes (Continued)
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FIGURE 3. RGB MUX USING TWO LMH6572’s
If it is important in the end application to make sure that no
two inputs are presented to the output at the same time, an
optional delay block can be added prior to the ENABLE (EN)
pin of each device, as shown. Figure 4 shows one possible
approach to this delay circuit. The delay circuit shown will
delay ENABLE’s H to L transitions (R₁ and C₁ decay) but will
not delay its L to H transition.
a triple 8:1 MUX. With the internal resistors valued at ap-
proximately 800Ω, the gain error is about
-0.57 dB, or about −6%.
20109619
FIGURE 4. Delay Circuit Implementation
R₂ should be kept small compared to R₁ in order to not
reduce the ENABLE voltage and to produce little or no delay
to theENABLE L to H transition.
With the ENABLE pin putting the output stage into a high
impedance state, several LMH6572’s can be tied together to
form a larger input MUX. However, there is a slight loading
effect on the active output caused by the off-channel feed-
back and gain set resistors, as shown in Figure 5. Figure 5 is
assuming there are 4 LMH6572 devices tied together to form
20109617
FIGURE 5. Multiplexer Input Expansion by
Combining Outputs
An alternate approach would be to tie the outputs directly
together and let all devices share a common back termina-
tion resistor in order to alleviate the gain error issue above.
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