LM3406_09 Datasheet, PDF (9/26 Pages) National Semiconductor (TI) – 1.5A Constant Current Buck Regulator for Driving High Power LEDs

BOOT pin. Both rise time and fall time are 20 ns each (typical)
and the approximate gate charge is 9 nC. The high-side rail
for the driver circuitry uses a bootstrap circuit consisting of an
internal high-voltage diode and an external 22 nF capacitor,
C_B. V_CC charges C_B through the internal diode while the power
MOSFET is off. When the MOSFET turns on, the internal
diode reverse biases. This creates a floating supply equal to
the V_CC voltage minus the diode drop to drive the MOSFET
when its source voltage is equal to V_IN.
FAST LOGIC PIN FOR PWM DIMMING
The DIM pin is a TTL compatible input for PWM dimming of
the LED. A logic low (below 0.8V) at DIM will disable the in-
ternal MOSFET and shut off the current flow to the LED array.
While the DIM pin is in a logic low state the support circuitry
(driver, bandgap, VCC) remains active in order to minimize
the time needed to turn the LED array back on when the DIM
pin sees a logic high (above 2.2V). A 75 µA (typical) pull-up
current ensures that the LM3406/06HV is on when DIM pin is
open circuited, eliminating the need for a pull-up resistor.
Dimming frequency, f_DIM, and duty cycle, D_DIM, are limited by
the LED current rise time and fall time and the delay from
activation of the DIM pin to the response of the internal power
MOSFET. In general, f_DIM should be at least one order of
magnitude lower than the steady state switching frequency in
order to prevent aliasing.
INPUT VOLTAGE COMPARATOR FOR PWM DIMMING
Adding an external input diode and using the internal VINS
comparator allows the LM3406/06HV to sense and respond
to dimming that is done by PWM of the input voltage. This
method is also referred to as "Two-Wire Dimming", and a typ-
ical application circuit is shown in Figure 2. If the VINS pin
voltage falls 70% below the VIN pin voltage, the
LM3406/06HV disables the internal power FET and shuts off
the current to the LED array. The support circuitry (driver,
bandgap, VCC) remains active in order to minimize the time
needed to the turn the LED back on when the VINS pin volt-
age rises and exceeds 70% of VIN. This minimizes the re-
sponse time needed to turn the LED array back on.
FIGURE 2. Typical Application using Two-Wire Dimming
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PARALLEL MOSFET FOR HIGH-SPEED PWM DIMMING
For applications that require dimming at high frequency or
with wide dimming duty cycle range neither the VINS com-
parator or the DIM pin are capable of slewing the LED current
from 0 to the target level fast enough. For such applications
the LED current slew rate can by increased by shorting the
LED current with a N-MOSFET placed in parallel to the LED
or LED array, as shown in Figure 3. While the parallel FET is
on the output current flows through it, effectively reducing the
output voltage to equal the CS pin voltage of 0.2V. This dim-
ming method maintains a continuous current through the
inductor, and therefore eliminates the biggest delay in turning
the LED(s) or and off. The trade-off with parallel FET dimming
is that more power is wasted while the FET is on, although in
most cases the power wasted is small compared to the power
dissipated in the LEDs. Parallel FET circuits should use no
output capacitance or a bare minimum for noise filtering in
order to minimize the slew rate of output voltage. Dimming
FET Q1 can be driven from a ground-referenced source be-
cause the source stays at 0.2V along with the CS pin.
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