LM3406_09 Datasheet, PDF (20/26 Pages) National Semiconductor (TI) – 1.5A Constant Current Buck Regulator for Driving High Power LEDs

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FIGURE 11. Buck Converter Current Loops
The dark grey, inner loop represents the high current path
during the MOSFET on-time. The light grey, outer loop rep-
resents the high current path during the off-time.
GROUND PLANE AND SHAPE ROUTING
The diagram of Figure 11 is also useful for analyzing the flow
of continuous current vs. the flow of pulsating currents. The
circuit paths with current flow during both the on-time and off-
time are considered to be continuous current, while those that
carry current during the on-time or off-time only are pulsating
currents. Preference in routing should be given to the pulsat-
ing current paths, as these are the portions of the circuit most
likely to emit EMI. The ground plane of a PCB is a conductor
and return path, and it is susceptible to noise injection just as
any other circuit path. The continuous current paths on the
ground net can be routed on the system ground plane with
less risk of injecting noise into other circuits. The path be-
tween the input source and the input capacitor and the path
between the recirculating diode and the LEDs/current sense
resistor are examples of continuous current paths. In contrast,
the path between the recirculating diode and the input capac-
itor carries a large pulsating current. This path should be
routed with a short, thick shape, preferably on the component
side of the PCB. Do not place any vias near the anode of
Schottky diode. Instead, multiple vias in parallel should be
used right at the pad of the input capacitor to connect the
component side shapes to the ground plane. A second pul-
sating current loop that is often ignored is the gate drive loop
formed by the SW and BOOT pins and capacitor C_B. To min-
imize this loop and the EMI it generates, keep C_B close to the
SW and BOOT pins.
CURRENT SENSING
The CS pin is a high-impedance input, and the loop created
by R_SNS, R_Z (if used), the CS pin and ground should be made
as small as possible to maximize noise rejection. R_SNS should
therefore be placed as close as possible to the CS and GND
pins of the IC.
REMOTE LED ARRAYS
In some applications the LED or LED array can be far away
(several inches or more) from the LM3406/06HV, or on a sep-
arate PCB connected by a wiring harness. When an output
capacitor is used and the LED array is large or separated from
the rest of the converter, the output capacitor should be
placed close to the LEDs to reduce the effects of parasitic
inductance on the AC impedance of the capacitor. The current
sense resistor should remain on the same PCB, close to the
LM3406/06HV.
Remote LED arrays and high speed dimming with a parallel
FET must be treated with special care. The parallel dimming
FET should be placed on the same board and/or heatsink as
the LEDs to minimize the loop area between them, as the
switching of output current by the parallel FET produces a
pulsating current just like the switching action of the LM3406's
internal power FET and the Schottky diode. Figure 12 shows
the path that the inductor current takes through the LED or
through the dimming FET. To minimize the EMI from parallel
FET dimming the parasitic inductance of the loop formed by
the LED and the dimming FET (where only the dark grey ar-
rows appear) should be reduced as much as possible. Para-
sitic inductance of a loop is mostly controlled by the loop area,
hence making this loop as physically small (short) as possible
will reduce the inductance.
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FIGURE 12. Parallel FET Dimming Current Loops
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