DS90LV049 Datasheet, PDF (9/10 Pages) National Semiconductor (TI) – 3V LVDS Dual Line Driver with Dual Line Receiver

Applications Information (Continued)
The receiver’s internal fail-safe circuitry is designed to
source/sink a small amount of current, providing fail-safe
protection (a stable known state of HIGH output voltage) for
floating receiver inputs.
The DS90LV049 has two receivers, and if an application
requires a single receiver, the unused receiver inputs should
be left OPEN. Do not tie unused receiver inputs to ground or
any other voltages. The input is biased by internal high value
pull up and pull down current sources to set the output to a
HIGH state. This internal circuitry will guarantee a HIGH,
stable output state for open inputs.
External lower value pull up and pull down resistors (for a
stronger bias) may be used to boost fail-safe in the presence
of higher noise levels. The pull up and pull down resistors
should be in the 5 kΩ to 15 kΩ range to minimize loading and
waveform distortion to the driver. The common-mode bias
point should be set to approximately 1.2 V (less than 1.75 V)
to be compatible with the internal circuitry.
For more information on failsfe biasing of LVDS interfaces
please refer to AN-1194.
Pin Descriptions
Pin No.
10, 11
6, 7
5, 8
2, 3
1, 4
14, 15
9, 16
12
13
Name
D_IN
D_OUT+
D_OUT−
R_IN+
R_IN-
R_OUT
EN, EN
V_DD
GND
Description
Driver input pins, LVCMOS levels. There is a pull-down current
source present.
Non-inverting driver output pins, LVDS levels.
Inverting driver output pins, LVDS levels.
Non-inverting receiver input pins, LVDS levels. There is a pull-up
current source present.
Inverting receiver input pins, LVDS levels. There is a pull-down
current source present.
Receiver output pins, LVCMOS levels.
Enable and Disable pins. There are pull-down current sources
present at both pins.
Power supply pin.
Ground pin.
Typical Performance Curves
Differential Output Voltage
vs Load Resistor
Power Supply Current
vs Frequency
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