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DS90LV049 Datasheet, PDF (3/10 Pages) National Semiconductor (TI) – 3V LVDS Dual Line Driver with Dual Line Receiver
Electrical Characteristics (Continued)
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 4, 6)
Symbol
Parameter
Conditions
Pin
Min Typ Max Units
LVCMOS Output DC Specifications (Receiver Outputs)
VOH
Output High Voltage
VOL
Output Low Voltage
IOZ
Output TRI-STATE Current
General DC Specifications
IOH = -0.4 mA, VID= 200 mV
2.7
3.3
V
IOL = 2 mA, VID = 200 mV
ROUT
0.05 0.25
V
Disabled, VOUT =0 V or VDD
-10
±1
+10
µA
IDD
Power Supply Current (Note 3) EN = 3.3 V
IDDZ
TRI-State Supply Current
EN = 0 V
21
35
mA
VDD
15
25
mA
Switching Characteristics
VDD = +3.3V ± 10%, TA = −40˚C to +85˚C (Notes 4, 13)
Symbol
Parameter
LVDS Outputs (Driver Outputs)
tPHLD
tPLHD
tSKD1
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Differential Pulse Skew |tPHLD − tPLHD|
(Notes 5, 7)
tSKD2
Differential Channel-to-Channel Skew
(Notes 5, 8)
tSKD3
Differential Part-to-Part Skew (Notes 5, 9)
tTLH
Rise Time (Note 5)
tTHL
Fall Time (Note 5)
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
fMAX
Maximum Operating Frequency (Note 16)
LVCMOS Outputs (Receiver Outputs)
tPHL
tPLH
tSK1
tSK2
tSK3
tTLH
tTHL
tPHZ
tPLZ
tPZH
tPZL
fMAX
Propagation Delay High to Low
Propagation Delay Low to High
Pulse Skew |tPHL − tPLH| (Note 10)
Channel-to-Channel Skew (Note 11)
Part-to-Part Skew (Note 12)
Rise Time(Note 5)
Fall Time(Note 5)
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency (Note 17)
Conditions
RL = 100 Ω
(Figure 2 and Figure 3)
RL = 100 Ω
(Figure 4 and Figure 5)
(Figure 6 and Figure 7)
(Figure 8 and Figure 9)
Min Typ Max Units
0.7
2
ns
0.7
2
ns
0
0.05
0.4
ns
0
0.05
0.5
ns
0
1.0
0.2
0.4
1
0.2
0.4
1
1.5
3
1.5
3
1
3
6
1
3
6
200
250
ns
ns
ns
ns
ns
ns
ns
MHz
0.5
2
3.5
0.5
2
3.5
0
0.05
0.4
0
0.05
0.5
0
1.0
0.3
0.9
1.4
0.3
0.75
1.4
3
5.6
8
3
5.4
8
2.5
4.6
7
2.5
4.6
7
200
250
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: VTH, VTL,
VOD and ∆VOD.
Note 3: Both, driver and receiver inputs are static. All LVDS outputs have 100 Ω load. All LVCMOS outputs are floating. None of the outputs have any lumped
capacitive load.
Note 4: All typical values are given for: VDD = +3.3 V, TA = +25˚C.
Note 5: These parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over PVT (process, voltage,
temperature) ranges.
Note 6: The DS90LV049’s drivers are current mode devices and only function within datasheet specifications when a resistive load is applied to their outputs. The
typical range of the resistor values is 90 Ω to 110 Ω.
Note 7: tSKD1 or differential pulse skew is defined as |tPHLD − tPLHD|. It is the magnitude difference in the differential propagation delays between the positive going
edge and the negative going edge of the same driver channel.
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