LMC6042 Datasheet, PDF (8/13 Pages) National Semiconductor (TI) – CMOS Dual Micropower Operational Amplifier

Applications Hints (Continued)
nent of the output signal back to the amplifier’s inverting in-
put, thereby preserving phase margin in the overall feedback
loop.
Capacitive load driving capability is enhanced by using a
pull up resistor to V⁺ (Figure 3). Typically a pull up resistor
conducting 10 µA or more will significantly improve capaci-
tive load responses. The value of the pull up resistor must be
determined based on the current sinking capability of the
amplifier with respect to the desired output swing. Open loop
gain of the amplifier can also be affected by the pull up resis-
tor (see Electrical Characteristics).
DS011137-18
FIGURE 3. Compensating for Large
Capacitive Loads with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT FOR
HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6042, typically less
than 2 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6042’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in Figure
4. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10¹²â„¦, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6042’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10¹¹â„¦ would
cause only 0.05 pA of leakage current. See Figure 5 for typi-
cal connections of guard rings for standard op-amp
configurations.
FIGURE 4. Example of Guard Ring
in P.C. Board Layout
DS011137-7
Inverting Amplifier
DS011137-8
Non-Inverting Amplifier
DS011137-10
DS011137-9
Follower
FIGURE 5. Typical Connections of Guard Rings
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