DS90CR218A Datasheet, PDF (8/15 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 85 MHz

AC Timing Diagrams (Continued)
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FIGURE 11. DS9OCR218A (Receiver) Phase Lock Loop Set Time
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FIGURE 12. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs (DS90CR217)
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FIGURE 13. Transmitter Powerdown Delay
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