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OPA4830 Datasheet, PDF (7/45 Pages) National Semiconductor (TI) – Quad, Low-Power, Single-Supply, Wideband Operational Amplifier
OPA4830
www.ti.com.................................................................................................................................................... SBOS350A – DECEMBER 2006 – REVISED MAY 2008
ELECTRICAL CHARACTERISTICS: VS = +3V
Boldface limits are tested at +25°C.
At TA = +25°C, G = +2, and RL = 150Ω to VS/3, unless otherwise noted.
OPA4830IPW
TYP
MIN/MAX OVER TEMPERATURE
PARAMETER
CONDITIONS
+25°C
+25°C (2)
0°C to
+70°C (3)
AC PERFORMANCE (see Figure 73)
Small-Signal Bandwidth
Gain-Bandwidth Product
G = +2, VO ≤ 0.2VPP
100
70
66
G = +5, VO ≤ 0.2VPP
21
15
14
G = +10, VO ≤ 0.2VPP
10
7.5
6.5
G ≥ +10
100
75
65
Slew Rate
1V Step
220
135
105
Rise Time
0.5V Step
3.4
5.6
5.7
Fall Time
0.5V Step
3.4
5.6
5.7
Settling Time to 0.1%
1V Step
46
73
88
Harmonic Distortion
2nd-Harmonic
3rd-Harmonic
Input Voltage Noise
VO = 1VPP, f = 5MHz
RL = 150Ω
RL ≥ 500Ω
RL = 150Ω
RL ≥ 500Ω
f > 1MHz
–60
–56
–65
–59
–68
–59
–76
–65
9.2
10.3
–54
–57
–58
–64
10.8
Input Current Noise
DC PERFORMANCE(4)
f > 1MHz
3.5
4.6
5.1
Open-Loop Voltage Gain
72
66
65
Input Offset Voltage
±1.5
±7.5
±8.7
Average Offset Voltage Drift
±27
Input Bias Current
Input Bias Current Drift
VCM = 1.0V
+5
+10
+12
±44
Input Offset Current
Input Offset Current Drift
VCM = 1.0V
±0.2
±1.1
±1.3
±5
INPUT
Least Positive Input Voltage(5)
Most Positive Input Voltage(5)
–0.45
–0.4
1.2
1.1
–0.27
1.0
Common-Mode Rejection Ratio (CMRR)
Input-Referred
80
74
72
Input Impedance
Differential-Mode
10 || 2.1
Common-Mode
400 || 1.2
OUTPUT
Least Positive Output Voltage
Most Positive Output Voltage
Current Output, Sourcing and Sinking
G = +5, RL = 1kΩ to 1.5V
0.08
0.11
G = +5, RL = 150Ω to 1.5V
0.17
0.39
G = +5, RL = 1kΩ to 1.5V
2.91
2.88
G = +5, RL = 150Ω to 1.5V
2.82
2.74
±30
±20
0.125
0.40
2.85
2.70
±18
Short-Circuit Output Current
Output Shorted to Either Supply
±45
Closed-Loop Output Impedance
See Figure 73, f < 100kHz
0.06
UNITS
MHz
MHz
MHz
MHz
V/µs
ns
ns
ns
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
dB
mV
µV/°C
µA
nA/°C
µA
nA/°C
V
V
dB
kΩ || pF
kΩ || pF
V
V
V
V
mA
mA
Ω
MIN/
MAX
TEST LEVEL(1)
min
B
min
B
min
B
min
B
min
B
max
B
max
B
max
B
max
B
max
B
max
B
max
B
max
B
max
B
min
A
max
A
max
B
max
A
max
B
max
A
max
B
max
A
min
A
min
A
typ
C
typ
C
max
A
max
A
min
A
min
A
min
A
typ
C
typ
C
(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for +25°C specifications.
(3) Junction temperature = ambient at low temperature limits; junction temperature = ambient +5°C at high temperature limit for over
temperature specifications.
(4) Current considered positive out of pin.
(5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.
Copyright © 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): OPA4830
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