LMH6601_09 Datasheet, PDF (7/28 Pages) National Semiconductor (TI) – 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

Symbol
Parameter
I_CC
Supply Current
VOH1
VOH2
VOH3
Output High Voltage
(Relative to V⁺)
VOL1
VOL2
VOL3
Output Low Voltage
(Relative to V^–)
I_O
I_O_1
Load
Output Current
Output Load Rating
R_O_Enable Output Resistance
R_O_Disabled Output Resistance
C_O_Disabled Output Capacitance
Miscellaneous Performance
VDMAX
Voltage Limit for Disable (Pin 5)
VDMIN
Voltage Limit for Enable (Pin 5)
I_i
V_{_glitch}
T_on
T_off
Isolation_OFF
Logic Input Current (Pin 5)
Turn-on Glitch
Turn-on Time
Turn-off Time
Off Isolation
Condition
Normal Operation
V_OUT = V_S/2
Shutdown
SD tied to ≤ 0.27V (Note 5)
R_L = 150Ω to V^–
R_L = 75Ω to V_S/2
R_L = 10 kΩ to V^–
R_L = 150Ω to V^–
R_L = 75Ω to V_S/2
R_L = 10 kΩ to V^–
V_OUT ≤ 0.6V from Respective ^Source
Supply
Sink
V_OUT = V_S/2, V_ID = ±18 mV Source
(Note 10)
Sink
THD < −30 dBc, f = 200 kHz, R_L tied to
V_S/2, V_OUT = 2.2 V_PP
Enabled, A_V = +1
Shutdown
Shutdown
(Note 5)
(Note 5)
SD = 2.7V (Note 5)
1 MHz, R_L = 1 kΩ
Min
(Note 6)
–260
–420
–50
100
25
35
0
2.43
Typ
(Note 6)
9.0
100
–200
–200
–10
+4
+125
+4
25
62
40
0.2
>100
5.6
4
1.2
5.2
760
60
Max
(Note 6)
10.6
12.5
+45
+125
+45
125
0.27
2.7
Units
mA
nA
mV
mV
mA
Ω
Ω
MΩ
pF
V
V
pA
V
µs
ns
dB
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T_J >
T_A.
Note 3: The maximum continuous output current (I_OUT) is determined by device power dissipation limitations.
Note 4: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 5: SD logic is CMOS compatible. To ensure proper logic level and to minimize power supply current, SD should typically be less than 10% of total supply
voltage away from either supply rail.
Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 7: Negative input current implies current flowing out of the device.
Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.
Note 9: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 10: “V_ID” is input differential voltage (input overdrive).
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