LMH6601_09 Datasheet, PDF (21/28 Pages) National Semiconductor (TI) – 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

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FIGURE 9. AC Coupled Video Amplifier/Driver with SAG Compensation
In this circuit, the output coupling capacitor value and size is
reduced at the expense of a slightly more complicated cir-
cuitry. Note that C1 is not only part of the SAG compensation,
but it also sets the amplifier’s DC gain to 0 dB so that the
output is set to mid-rail for linearity purposes. Also note that
exceptionally high values are chosen for the R1 and R2 bi-
asing resistors (510 kΩ). The LMH6601 has extremely low
input bias current which allows this selection thereby reducing
the C_IN value in this circuit such that C_IN can even be a non-
polar capacitors which will reduce cost.
At high enough frequencies where both C_O and C₁ can be
considered to be shorted out, R₃ shunts R₄ and the closed
loop gain is determined by:
Closed_loop_Gain (V/V)= V_L/V_IN = (1+ (R₃||R₄)/ R₅)x
[R_L/(R_L+R_O)]= 0.99V/V
(4)
At intermediate frequencies, where the C_O, R_O, R_L path ex-
periences low frequency gain loss, the R₃, R₅, C₁ path pro-
vides feedback from the load side of C_O. With the load side
gain reduced at these lower frequencies, the feedback to the
op amp inverting node reduces, causing an increase at the
op amp's output as a response.
For NTSC video, low values of C_O influence how much video
black level shift occurs during the vertical blanking interval
(∼1.5 ms) which has no video activity and thus is sensitive to
C_O's charge dissipation through the load which could cause
output SAG. An especially tough pattern is the NTSC pattern
called “Pulse & Bar.” With this pattern the entire top and bot-
tom portion of the field is black level video where, for about
11 ms, C_O is discharging through the load with no video ac-
tivity to replenish that charge.
Figure 10 shows the output of the Figure 9 circuit highlighting
the SAG.
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FIGURE 10. Figure 9 Scope Photo Showing Video SAG
With the circuit of Figure 9 and any other AC coupled pulse
amplifier, the waveform duty cycle variations exert additional
restrictions on voltage swing at any node. This is illustrated in
the waveforms shown in Figure 11.
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