LMH0356_08 Datasheet, PDF (7/16 Pages) National Semiconductor (TI) – 3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs

Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
t_r, t_f Input rise/fall time
20%–80%, 270 Mbps, SDI
(Note 4)
1500
ps
t_r, t_f Input rise/fall time
20%–80%, 1483 or 1485
Mbps, (Note 4)
270
ps
t_r, t_f Input rise/fall time
20%–80%, 2967 or 2970
Mbps, (Note 4)
135
ps
t_r, t_f
t_r, t_f
F_REF
Output rise/fall time
Output rise/fall time
Reference Clock
Frequency
10%–90%
20%–80%, (Notes 5, 8)
Logic outputs
SDO, SCO
1.5
ns
90
130
ps
27
MHz
F_TOL
Reference Clock
Frequency Tolerance
±50
ppm
Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics”
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to V_EE (equal to
zero volts).
Note 3: Typical values are stated for: V_CC = +3.3V, T_A = +25°C.
Note 4: This specification is guaranteed by design.
Note 5: R_L = 100Ω differential.
Note 6: Measured from first SDI transition until Lock Detect (LD) output goes high (true).
Note 7: Peak-to-peak amplitude with sinusoidal modulation per SMPTE RP 184-1996 paragraph 4.1. The test data signal shall be color bars.
Note 8: This parameter is guaranteed by characterization over voltage and temperature limits.
Note 9: Refer to “A1” in Figure 1 of SMPTE RP 184-1996.
Note 10: Refer to “A2” in Figure 1 of SMPTE RP 184-1996.
Note 11: PRBS 2¹⁰– 1, input jitter = 31 ps_P-P.
Note 12: PRBS 2¹⁰– 1, input jitter = 24 ps_P-P.
Note 13: PRBS 2¹⁰– 1, input jitter = 22 ps_P-P.
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