LMH0356_08 Datasheet, PDF (10/16 Pages) National Semiconductor (TI) – 3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs

SERIAL DATA INPUT SELECTOR
The Serial Data Input Selector (SEL [1:0]) allows the user to
select the active input channel. Table 2 shows the input se-
lected for a given state of SEL [1:0]. The SEL pins have
internal pull-downs.
TABLE 2. Data Input Select Codes
SEL [1:0] Code
Selected Input
00
SDI0
01
SDI1
10
SDI2
11
SDI3
LOCK DETECT
The Lock Detect (LD) output, when high, indicates that data
is being received and the PLL is locked. LD may be connected
to the OUTPUT MUTE input to mute the data and clock out-
puts when no data signal is being received. Note than when
the Bypass/Auto Bypass input is set high, Lock Detect will
remain low. See Table 3.
OUTPUT MUTE
The OUTPUT MUTE input, when low, mutes the serial data
and clock outputs. It may be connected to Lock Detect or ex-
ternally driven to mute or un-mute the outputs. If OUTPUT
MUTE is connected to LD, then the data and clock outputs
are muted when the PLL is not locked. This function overrides
the Bypass function: see Table 3. OUTPUT MUTE has an
internal pull-up device to enable the output by default.
BYPASS/AUTO BYPASS
The Bypass/Auto Bypass input, when high, forces the device
to output the data without reclocking it. When this input is low,
the device automatically bypasses the reclocking function
when the device is in an unlocked condition or the detected
data rate is a rate which the device does not support. Note
than when the Bypass/Auto Bypass input is set high, Lock
Detect will remain low. See Table 3. BYPASS/AUTO BY-
PASS has an internal pull-down device.
TABLE 3. Control Functionality
LOCK DETECT
0
1
X
0
1
OUTPUT MUTE
1
1
0
LOCK DETECT
LOCK DETECT
BYPASS/AUTO BYPASS
X
0
X
X
0
DEVICE STATUS
PLL unlocked, reclocker bypassed
PLL locked to supported data rate, reclocker not bypassed
Outputs muted
Outputs muted
PLL locked to supported data rate, reclocker not bypassed
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