LMC6022 Datasheet, PDF (7/16 Pages) National Semiconductor (TI) – Low Power CMOS Dual Operational Amplifier

Typical Performance Characteristics V_S = ±7.5V, T_A = 25˚C unless otherwise specified (Continued)
Non-Inverting Small
Signal Pulse Response
(A_V = +1)
Inverting Large-Signal
Pulse Response
Inverting Small-Signal
Pulse Response
DS011236-45
Stability vs Capacitive Load
DS011236-46
Stability vs Capacitive Load
DS011236-47
DS011236-4
Note: Avoid resistive loads of less than 500Ω, as they may cause
instability.
Application Hints
AMPLIFIER TOPOLOGY
The topology chosen for the LMC6022 is unconventional
(compared to general-purpose op amps) in that the tradi-
tional unity-gain buffer output stage is not used; instead, the
output is taken directly from the output of the integrator, to al-
low rail-to-rail output swing. Since the buffer traditionally de-
livers the power to the load, while maintaining high op amp
gain and stability, and must withstand shorts to either rail,
these tasks now fall to the integrator.
As a result of these demands, the integrator is a compound
affair with an embedded gain stage that is doubly fed forward
(via C_f and C_ff) by a dedicated unity-gain compensation
driver. In addition, the output portion of the integrator is a
push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
DS011236-5
DS011236-6
FIGURE 1. LMC6022 Circuit Topology (Each Amplifier)
The large signal voltage gain while sourcing is comparable
to traditional bipolar op amps for load resistance of at least 5
kΩ. The gain while sinking is higher than most CMOS op
amps, due to the additional gain stage; however, when driv-
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