LMC6022 Datasheet, PDF (2/16 Pages) National Semiconductor (TI) – Low Power CMOS Dual Operational Amplifier

Absolute Maximum Ratings (Note 1)
Differential Input Voltage
Supply Voltage (V⁺ − V^−)
Lead Temperature
(Soldering, 10 sec.)
Storage Temperature Range
Junction Temperature
ESD Tolerance (Note 4)
Voltage at Output/Input Pin
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
±Supply Voltage
16V
260˚C
−65˚C to +150˚C
150˚C
1000V
(V⁺) +0.3V, (V^−) −0.3V
±18 mA
35 mA
(Note 3)
Current at Input Pin
Output Short Circuit to V^−
Output Short Circuit to V⁺
Operating Ratings
Temperature Range
Supply Voltage Range
Power Dissipation
Thermal Resistance (θ_JA), (Note 11)
8-Pin DIP
8-Pin SO
±5 mA
(Note 2)
(Note 12)
−40˚C ≤ T_J ≤ +85˚C
4.75V to 15.5V
(Note 10)
101˚C/W
165˚C/W
DC Electrical Characteristics
The following specifications apply for V⁺ = 5V,
face limits apply at the temperature extremes;
V^− = 0V, V_CM
all other limits
=
T_J
1=.52V5,˚CV_O.
=
2.5V,
and
R_L
=
1M
unless
otherwise
noted.
Bold-
Symbol
Parameter
Conditions
Typical
(Note 5)
LMC6022I
Limit
(Note 6)
Units
V_OS
Input Offset Voltage
1
9
mV
11
max
∆V_OS/∆T
Input Offset Voltage
Average Drift
2.5
µV/˚C
I_B
Input Bias Current
0.04
pA
200
max
I_OS
Input Offset Current
0.01
pA
100
max
R_IN
CMRR
Input Resistance
Common Mode
Rejection Ratio
0V ≤ V_CM ≤ 12V
V⁺ = 15V
>1
TeraΩ
83
63
dB
61
min
+PSRR
Positive Power Supply
5V ≤ V⁺ ≤ 15V
83
63
dB
Rejection Ratio
61
min
−PSRR
Negative Power Supply
0V ≤ V^− ≤ −10V
94
74
dB
Rejection Ratio
73
min
V_CM
Input Common-Mode
V⁺ = 5V & 15V
Voltage Range
For CMRR ≥ 50 dB
−0.4
−0.1
V
0
max
V⁺ − 1.9
V⁺ − 2.3
V
V⁺ − 2.5
min
A_V
Large Signal
Voltage Gain
R_L = 100 kΩ (Note 7)
Sourcing
1000
200
V/mV
100
min
Sinking
500
90
V/mV
40
min
R_L = 5 kΩ (Note 7)
Sourcing
1000
100
V/mV
75
min
Sinking
250
50
V/mV
20
min
www.national.com
2