DS90CF561 Datasheet, PDF (7/12 Pages) National Semiconductor (TI) – LVDS 18-Bit Color Flat Panel Display (FPD) Link

AC Timing Diagrams (Continued)
DS012485-16
Measurements at Vdiff = 0V
TCCS measured between earliest and latest initial LVDS edges.
TxCLK OUT Differential High→Low Edge for DS90CF561
TxCLK OUT Differential Low→High Edge for DS90CR561
FIGURE 6. DS90CF561 (Transmitter) Channel-to-Channel Skew and Pulse Width
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FIGURE 7. DS90CF561 (Transmitter) Setup/Hold and High/Low Times
DS012485-13
FIGURE 8. DS90CF562 (Receiver) Setup/Hold and High/Low Times
DS012485-17
FIGURE 9. DS90CF561 (Transmitter) Clock In to Clock Out Delay
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