DS90C032 Datasheet, PDF (7/12 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Receiver

Applications Information (Continued)
2. Terminated Input. TheDS90C032 requires external fail-
safe biasing for terminated input failsafe.
Terminated input failsafe is the case of a receiver that
has a 100Ω termination across its inputs and the driver
is in the following situations. Unplugged from the bus, or
the driver output is in TRI-STATE or in power-off condi-
tion. The use of external biasing resistors provide a
small bias to set the differential input voltage while the
line is un-driven, and therefore the receiver output will be
in HIGH state. If the driver is removed from the bus but
the cable is still present and floating, the unplugged
cable can become a floating antenna that can pick up
noise. The LVDS receiver is designed to detect very
small amplitude and width signals and recover them to
standard logic levels. Thus, if the cable picks up more
than 10mV of differential noise, the receiver may re-
spond. To insure that any noise is seen as common-
mode and not differential, a balanced interconnect and
twisted pair cables is recommended, as they help to
ensure that noise is coupled common to both lines and
rejected by the receivers.
3. Shorted Inputs. If a fault condition occurs that shorts
the receiver inputs together, thus resulting in a 0V differ-
ential input voltage, the receiver output will remain in a
HIGH state. Shorted input fail-safe is not supported
across the common-mode range of the device (1.2V
±1V). It is only supported with inputs shorted and no
external common-mode voltage applied.
4. Operation in environment with greater than 10mV
differential noise.
National recommends external failsafe biasing on its
LVDS receivers for a number of system level and signal
quality reasons. First, only an application that requires
failsafe biasing needs to employ it. Second, the amount
of failsafe biasing is now an application design param-
eter and can be custom tailored for the specific applica-
tion. In applications in low noise environments, they may
choose to use a very small bias if any. For applications
with less balanced interconnects and/or in high noise
environments they may choose to boost failsafe further.
Nationals "LVDS Owner’s Manual provides detailed cal-
culations for selecting the proper failsafe biasing resis-
tors. Third, the common-mode voltage is biased by the
resistors during the un-driven state. This is selected to
be close to the nominal driver offset voltage (V_OS). Thus
when switching between driven and un-driven states,
the common-mode modulation on the bus is held to a
minimum.
For additional Failsafe Biasing information, please refer
to Application Note AN-1194 for more detail.
The footprint of theDS90C032 is the same as the industry
standard 26LS32 Quad Differential (RS-422) Receiver.
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