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LP2966EP Datasheet, PDF (6/15 Pages) National Semiconductor (TI) – Enhanced Plastic Dual 150mA Ultra Low-Dropout Regulator
Electrical Characteristics (Continued)
Note 16: Output voltage tolerance specification also includes the line regulation and load regulation.
Note 17: LP2966EP has fold back current limited short circuit protection. The knee is the current at which the output voltage drops 10% below the nominal value.
Note 18: VSDT is the shutdown pin voltage threshold below which the output is disabled.
Note 19: The condition VIN = VO(NOM) + 1V applies when Vout1 = Vout2. If Vout1 ≠ Vout2, then this condition would apply to the output which is greater in value.
As an example, if Vout1 = 3.3V and Vout2 = 5V, then the condition VIN = VO(NOM)+ 1V would apply to Vout2 only.
Note 20: Turn-on delay is the time interval between the low to high transition on the shutdown pin to the output voltage settling to within 5% of the nominal value.
Turn-off delay is the time interval between the high to low transition on the shutdown pin to the output voltage dropping below 50% of the nominal value. The external
load impedance influences the output voltage decay in shutdown mode.
Note 21: The limits for the ground pin current specification, IGND(0,1) will be same as the limits for the specification, IGND(1,0).
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