LMD18200T Datasheet, PDF (6/14 Pages) National Semiconductor (TI) – 3A, 55V H-Bridge

Switching Time Definitions
Pinout Description
(See Connection Diagram)
Pin 1, BOOTSTRAP 1 Input: Bootstrap capacitor pin for half
H-bridge number 1. The recommended capacitor (10 nF) is
connected between pins 1 and 2.
Pin 2, OUTPUT 1: Half H-bridge number 1 output.
Pin 3, DIRECTION Input: See Table 1. This input controls
the direction of current flow between OUTPUT 1 and OUT-
PUT 2 (pins 2 and 10) and, therefore, the direction of rotation
of a motor load.
Pin 4, BRAKE Input: See Table 1. This input is used to brake
a motor by effectively shorting its terminals. When braking is
desired, this input is taken to a logic high level and it is also
necessary to apply logic high to PWM input, pin 5. The drivers
that short the motor are determined by the logic level at the
DIRECTION input (Pin 3): with Pin 3 logic high, both current
sourcing output transistors are ON; with Pin 3 logic low, both
current sinking output transistors are ON. All output transis-
tors can be turned OFF by applying a logic high to Pin 4 and
a logic low to PWM input Pin 5; in this case only a small bias
current (approximately −1.5 mA) exists at each output pin.
Pin 5, PWM Input: See Table 1. How this input (and DIREC-
TION input, Pin 3) is used is determined by the format of the
PWM Signal.
Pin 6, V_S Power Supply
Pin 7, GROUND Connection: This pin is the ground return,
and is internally connected to the mounting tab.
Pin 8, CURRENT SENSE Output: This pin provides the
sourcing current sensing output signal, which is typically
377 μA/A.
Pin 9, THERMAL FLAG Output: This pin provides the ther-
mal warning flag output signal. Pin 9 becomes active-low at
1056809
145°C (junction temperature). However the chip will not shut
itself down until 170°C is reached at the junction.
Pin 10, OUTPUT 2: Half H-bridge number 2 output.
Pin 11, BOOTSTRAP 2 Input: Bootstrap capacitor pin for
Half H-bridge number 2. The recommended capacitor (10 nF)
is connected between pins 10 and 11.
PWM
H
H
L
H
H
L
TABLE 1. Logic Truth Table
Dir
Brake
Active Output Drivers
H
L
Source 1, Sink 2
L
L
Sink 1, Source 2
X
L
Source 1, Source 2
H
H Source 1, Source 2
L
H Sink 1, Sink 2
X
H NONE
Application Information
TYPES OF PWM SIGNALS
The LMD18200 readily interfaces with different forms of PWM
signals. Use of the part with two of the more popular forms of
PWM is described in the following paragraphs.
Simple, locked anti-phase PWM consists of a single, vari-
able duty-cycle signal in which is encoded both direction and
amplitude information (see Figure 2). A 50% duty-cycle PWM
signal represents zero drive, since the net value of voltage
(integrated over one period) delivered to the load is zero. For
the LMD18200, the PWM signal drives the direction input (pin
3) and the PWM input (pin 5) is tied to logic high.
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