LM3421_09 Datasheet, PDF (6/24 Pages) National Semiconductor (TI) – N-Channel Controllers for Constant Current LED Drivers

Symbol
θ_JA
θ_JC
Parameter
Conditions
Junction to Ambient (Note 4) 16L TSSOP EP
20L TSSOP EP
Junction to Exposed Pad (EP) 16L TSSOP EP
20L TSSOP EP
Min (Note 7) Typ (Note 8)
37.4
34.0
2.3
2.3
Max (Note 7)
Units
°C/W
°C/W
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended
to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: All voltages are with respect to the potential at the AGND pin, unless otherwise specified.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J=165°C (typical) and disengages at
T_J=140°C (typical).
Note 4: Junction-to-ambient thermal resistance is highly board-layout dependent. The numbers listed in the table are given for an reference layout wherein the
16L TSSOP package has its EP pad populated with 9 vias and the 20L TSSOP has its EP pad populated with 12 vias. In applications where high maximum power
dissipation exists, namely driving a large MOSFET at high switching frequency from a high input voltage, special care must be paid to thermal dissipation issues
during board design. In high-power dissipation applications, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-
MAX^{) is dependent on the maximum operating junction temperature (T}J-MAX-OP ^{= 125°C), the maximum power dissipation of the device in the application (P}D-
MAX^{), and the junction-to ambient thermal resistance of the package in the application (θ}JA^{), as given by the following equation: T}A-MAX ^{= T}J-MAX-OP ^{– (θ}JA ^{× P}D-
MAX^{). In most applications there is little need for the full power dissipation capability of this advanced package. Under these circumstances, no vias would be}
required and the thermal resistances would be 104 °C/W for the 16L TSSOP and 86.7 °C/W for the 20L TSSOP. It is possible to conservatively interpolate between
the full via count thermal resistance and the no via count thermal resistance with a straight line to get a thermal resistance for any number of vias in between
these two limits.
Note 5: Refer to National’s packaging website for more detailed information and mounting techniques. http://www.national.com/packaging/
Note 6: Human Body Model, applicable std. JESD22-A114-C. Machine Model, applicable std. JESD22-A115-A. Field Induced Charge Device Model, applicable
std. JESD22-C101-C.
Note 7: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100%
production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used
to calculate Average Outgoing Quality Level (AOQL).
Note 8: Typical numbers are at 25°C and represent the most likely norm.
Note 9: These electrical parameters are guaranteed by design, and are not verified by test.
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