LM3421_09 Datasheet, PDF (2/24 Pages) National Semiconductor (TI) – N-Channel Controllers for Constant Current LED Drivers

Connection Diagrams
Top View
Top View
30067304
16-Lead TSSOP EP
NS Package Number MXA16A
30067366
20-Lead TSSOP EP
NS Package Number MXA20A
Ordering Information
Order Number Spec.
Package Type
LM3421MH
LM3421MHX
LM3423MH
LM3423MHX
NOPB
NOPB
NOPB
NOPB
Pin Descriptions
TSSOP-16 EP
TSSOP-16 EP
TSSOP-20 EP
TSSOP-20 EP
NSC Package
Drawing
MXA16A
MXA16A
MXA20A
MXA20A
Supplied As
92 Units, Rail
2500 Units, Tape and Reel
73 Units, Rail
2500 Units, Tape and Reel
LM3423
1
2
3
4
LM3421
1
2
3
4
5
5
6
6
7
7
8
8
9
-
Name
V_IN
EN
COMP
CSH
RCT
AGND
OVP
nDIM
FLT
Function
Power supply input (4.5V-75V). Bypass with 100nF capacitor to AGND as close to the device
as possible in the circuit board layout.
Enable: Pull to ground for zero current shutdown. Tie directly to V_IN for automatic startup at
4.1V.
Compensation: PWM controller error amplifier compensation pin. This pin connects through
a series resistor-capacitor network to AGND.
Current Sense High: Output of the high side sense amplifier and input to the main regulation
loop error amplifier.
Resistor Capacitor Timing: External RC network sets the predictive “off-time” and thus the
switching frequency. The RC network should be placed as close to the device as possible in
the circuit board layout.
Analog Ground: The proper place to connect the compensation and timing capacitor returns.
This pin should be connected via the circuit board to the PGND pin through the EP copper
circuit board pad.
Over-Voltage Protection sense input: 1.24V threshold with hysteresis that is user
programmable by the selection of the OVP Over-Voltage Lock-Out (OVLO) resistor divider
network.
Not DIM input: Dual function pin. Primarily used as the Pulse Width Modulation (PWM) input.
When driven with a resistor divider from V_IN, this pin also functions as a user programmable
V_IN Under-Voltage Lock-Out (UVLO) with 1.24V threshold and programmable hysteresis by
the UVLO resistor divider network. The PWM and UVLO functions can be performed
simultaneously.
Fault flag: This is an N-channel MOSFET open drain output. The FLT pin transitions to the
high (open) state once the Fault Timer has timed out and latched the controller off.
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