DS90LV032A Datasheet, PDF (6/9 Pages) National Semiconductor (TI) – 3V LVDS Quad CMOS Differential Line Receiver

Applications Information (Continued)
3. Shorted Inputs. If a fault condition occurs that shorts
the receiver inputs together, thus resulting in a 0V differ-
ential input voltage, the receiver output will remain in a
HIGH state. Shorted input fail-safe is not supported
across the common-mode range of the device (GND to
2.4V). It is only supported with inputs shorted and no ex-
ternal common-mode voltage applied.
External lower value pull up and pull down resistors (for a
stronger bias) may be used to boost fail-safe in the presence
of higher noise levels. The pull up and pull down resistors
should be in the 5kΩ to 15kΩ range to minimize loading and
waveform distortion to the driver. The common-mode bias
point should be set to approximately 1.2V (less than 1.75V)
to be compatible with the internal circuitry.
The footprint of the DS90LV032A is the same as the industry
standard 26LS32 Quad Differential (RS-422) Receiver.
Pin Descriptions
Pin
No.
2, 6,
Name
Description
R_IN+ Non-inverting receiver input pin
Pin
No.
10, 14
1, 7,
9, 15
3, 5,
11, 13
4
12
16
8
Name
R_IN−
R_OUT
EN
EN*
V_CC
GND
Description
Inverting receiver input pin
Receiver output pin
Active high enable pin, OR-ed with
EN*
Active low enable pin, OR-ed with EN
Power supply pin, +3.3V ± 0.3V
Ground pin
Ordering Information
Operating
Temperature
−40˚C to +85˚C
−40˚C to +85˚C
Package Type/ Order Number
Number
SOP/M16A
DS90LV032ATM
TSSOP/MTC16 DS90LV032ATMTC
DS100067-8
FIGURE 6. ICC vs Frequency, four channels switching
DS100067-9
FIGURE 7. Typical Common-Mode Range variation with respect to amplitude of differential input
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