DS90LV028A_05 Datasheet, PDF (5/10 Pages) National Semiconductor (TI) – 3V LVDS Dual CMOS Differential Line Receiver

Applications Information (Continued)
FAIL-SAFE FEATURE
The LVDS receiver is a high gain, high speed device that
amplifies a small differential signal (20mV) to CMOS logic
levels. Due to the high gain and tight threshold of the re-
ceiver, care should be taken to prevent noise from appearing
as a valid signal.
The receiver’s internal fail-safe circuitry is designed to
source/sink a small amount of current, providing fail-safe
protection (a stable known state of HIGH output voltage) for
floating, terminated or shorted receiver inputs.
1. Open Input Pins. The DS90LV028A is a dual receiver
device, and if an application requires only 1 receiver, the
unused channel inputs should be left OPEN. Do not tie
unused receiver inputs to ground or any other voltages.
The input is biased by internal high value pull up and pull
down resistors to set the output to a HIGH state. This
internal circuitry will guarantee a HIGH, stable output
state for open inputs.
2. Terminated Input. If the driver is disconnected (cable
unplugged), or if the driver is in a power-off condition,
the receiver output will again be in a HIGH state, even
with the end of cable 100Ω termination resistor across
the input pins. The unplugged cable can become a
floating antenna which can pick up noise. If the cable
picks up more than 10mV of differential noise, the re-
ceiver may see the noise as a valid signal and switch. To
insure that any noise is seen as common-mode and not
differential, a balanced interconnect should be used.
Twisted pair cable will offer better balance than flat
ribbon cable.
3. Shorted Inputs. If a fault condition occurs that shorts
the receiver inputs together, thus resulting in a 0V differ-
ential input voltage, the receiver output will remain in a
HIGH state. Shorted input fail-safe is not supported
across the common-mode range of the device (GND to
2.4V). It is only supported with inputs shorted and no
external common-mode voltage applied.
External lower value pull up and pull down resistors (for a
stronger bias) may be used to boost fail-safe in the presence
of higher noise levels. The pull up and pull down resistors
should be in the 5kΩ to 15kΩ range to minimize loading and
waveform distortion to the driver. The common-mode bias
point should be set to approximately 1.2V (less than 1.75V)
to be compatible with the internal circuitry. Please refer to
application note AN-1194 “Failsafe Biasing of LVDS Inter-
faces” for more information.
PROBING LVDS TRANSMISSION LINES
Always use high impedance (> 100kΩ), low capacitance
(< 2 pF) scope probes with a wide bandwidth (1 GHz)
scope. Improper probing will give deceiving results.
CABLES AND CONNECTORS, GENERAL COMMENTS
When choosing cable and connectors for LVDS it is impor-
tant to remember:
Use controlled impedance media. The cables and connec-
tors you use should have a matched differential impedance
of about 100Ω. They should not introduce major impedance
discontinuities.
Balanced cables (e.g. twisted pair) are usually better than
unbalanced cables (ribbon cable, simple coax) for noise
reduction and signal quality. Balanced cables tend to gener-
ate less EMI due to field canceling effects and also tend to
pick up electromagnetic radiation a common-mode (not dif-
ferential mode) noise which is rejected by the receiver.
For cable distances < 0.5M, most cables can be made to
work effectively. For distances 0.5M ≤ d ≤ 10M, CAT 3
(category 3) twisted pair cable works well, is readily available
and relatively inexpensive.
Pin Descriptions
Pin No.
1, 4
2, 3
6, 7
8
5
Name
Description
R_IN-
R_IN+
R_OUT
V_CC
GND
Inverting receiver input pin
Non-inverting receiver input pin
Receiver output pin
Power supply pin, +3.3V ± 0.3V
Ground pin
Ordering Information
Operating
Temperature
−40˚C to +85˚C
−40˚C to +85˚C
Package Type/
Number
SOP/M08A
LLP/LDC08A
Order Number
DS90LV028ATM
DS90LV028ATLD
5
www.national.com