PC87570 Datasheet, PDF (41/168 Pages) National Semiconductor (TI) – PC87570 Keyboard and Power Management Controller

SZCFGn.WAIT ≠ 0
Bus Interface Unit (BIU)
begin
T_T1₁
Address placed on A0-15,
SELn: activated
SZCFGn.WAIT = 0
TIW
Internal waits corresponding to SZCFGn.WAIT
RD: active
Internal waits completed
T2
SZCFGn.{BW,WBR,BRE} = 001
Core attempts to read a word
SZCFGn.BW = 0
SZCFGn.(WBR,BRE} = 11
Core attempts to read a word
Next address on A0-15,
End of T2B: Data sampled
T2B
Next address
on A0-15
TBW
RD: active,
End of T2: Data is sampled
SZCFGn.HOLD≠ 0
{SZCFGn.BW = 1 or
SZCFGn.BRE = 0 or
Core attempts to read a byte}
Other SZCFGn
configuration
T_hold
First T_hold: SELn
and RD are deactivated
Hold cycles according
to SZCFGn.HOLD
SZCFGn.HOLD = 0
SZCFGn.HOLD ≠ 0
Hold cycles completed
end
Address on A0-15 invalid/changed,
SELn and RD inactive
Figure 3-9. Normal Read Bus Cycle
Note: Any reference to SZCFGn, also applies to the IOCFG Register.
Any reference to SELn, also applies to the SELIO signal.
TBW and T2B states do not exist in bus cycles of the IO zone.
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