THS4524-EP Datasheet, PDF (4/48 Pages) Texas Instruments – VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT, FULLY DIFFERENTIAL AMPLIFIER

THS4524-EP
SBOS609A – JUNE 2012 – REVISED AUGUST 2013
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THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
THS4524
DBT
UNITS
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-top characterization parameter⁽⁵⁾
Junction-to-board characterization parameter⁽⁶⁾
Junction-to-case (bottom) thermal resistance⁽⁷⁾
38 PINS
106.9
59.8
66.5
17.1
66.1
N/A
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
ELECTRICAL CHARACTERISTICS: V_S+ – V_S– = 3.3 V
At V_S+ = +3.3 V, V_S– = 0 V, V_OCM = open, V_OUT = 2 V_PP (differential), R_L = 1 kΩ differential, G = 1 V/V, single-ended input,
differential output, and input and output referenced to midsupply, unless otherwise noted.
PARAMETER
CONDITIONS
T_A = -55°C to 125°C
MIN
TYP
MAX
UNIT
TEST
LEVEL ⁽¹⁾
AC PERFORMANCE
Small-Signal Bandwidth
Gain Bandwidth Product
Large-Signal Bandwidth
Bandwidth for 0.1-dB Flatness
Rising Slew Rate (Differential)
Falling Slew Rate (Differential)
Overshoot
Undershoot
Rise Time
Fall Time
Settling Time to 1%
Harmonic Distortion
2nd harmonic
V_OUT = 100 mV_PP, G = 1
V_OUT = 100 mV_PP, G = 2
V_OUT = 100 mV_PP, G = 5
V_OUT = 100 mV_PP, G = 10
V_OUT = 100 mV_PP, G = 10
V_OUT = 2 V_PP, G = 1
V_OUT = 2 V_PP, G = 1
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
V_OUT = 2-V Step, G = 1, R_L = 200 Ω
f = 1 kHz, V_OUT = 1 V_RMS, G = 1⁽²⁾,
differential input
135
49
18.6
9.3
93
95
20
420
460
1.2
2.1
4
3.5
13
–122
MHz
C
MHz
C
MHz
C
MHz
C
MHz
C
MHz
C
MHz
C
V/μs
C
V/μs
C
%
C
%
C
ns
C
ns
C
ns
C
dBc
C
3rd harmonic
f = 1 MHz, V_OUT = 2 V_PP, G = 1
f = 1 kHz, V_OUT = 1 V_RMS, G = 1⁽²⁾,
differential input
–85
–141
dBc
C
dBc
C
Second-Order Intermodulation Distortion
f = 1 MHz, V_OUT = 2 V_PP, G = 1
Two-tone, f₁ = 2 MHz, f₂ = 2.2 MHz,
V_OUT = 2-V_PP envelope
–90
dBc
C
–83
dBc
C
(1) Test levels: (A) 100% tested. (B) Limits set by characterization and simulation. (C) Typical value only for information.
(2) Not directly measureable; calculated using noise gain of 101 as described in the Applications section, Audio Performance.
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