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LP3931 Datasheet, PDF (4/17 Pages) National Semiconductor (TI) – Dual RGB LED Driver with High Current Boost DC-DC Converter
Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V (SW, FB, R1- 2, G1-2,
B1-2) pins:
Voltage to GND (Notes 3, 4)
VDD1, VDD2, VDD_IO
Voltage on Logic Pins
I (R1, G1, B1, R2, G2, B2)
(Note 5)
I (VREF)
Continuous Power Dissipation
(Note 6)
Junction Temperature (TJ-MAX)
Storage Temperature Range
Maximum Lead Temperature
(Reflow soldering, 3 times)
(Note 7)
−0.3V to +7.2V
−0.3V to +6.0V
–0.3V to VDD_IO
+0.3V, with 6.0V max
150 mA
10 µA
Internally Limited
125˚C
−65˚C to +150˚C
240˚C
ESD Rating (Note 8)
Human Body Model:
Machine Model:
2 kV
200V
Operating Ratings (Notes 1, 2)
V (SW, FB, R1-2, G1-2, B1-2)
VDD1, VDD2 (Note 4)
VDD_IO
Recommended Load Current
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(Note 9)
3.0V to 6.0V
2.65V to 2.9V
1.8V to VDD1,2
0 mA to 300 mA
−40˚C to +125˚C
−40˚C to +85˚C
Thermal Properties
Junction-to-Ambient Thermal Resistance (θJA),
SQA24A Package (Note 10)
39˚C/W
Electrical Characteristics (Notes 2, 11)
Limits in standard typeface are for TJ = 25˚C. Limits in boldface type apply over the operating ambient temperature range
(−40˚C ≤ TJ ≤ +85˚C). Unless otherwise noted, specifications apply to the LP3931 Typical Application Circuit (pg. 1) with: VDD1
= VDD2 = VDDIO = 2.775V, CVDD1 = CVDD2 = CVDDIO = 0.1 µF, COUT = CIN = 10 µF, CVREF = 0.1 µF, L1 = 10 µH, RT = 82k
(Note 12).
Symbol
Parameter
Condition
Min
Typ
Max
Units
IDD
Standby Supply Current
(VDD1 and VDD2 current)
NSTBY = L (register)
SCK, SS, SI, NRST = H
No-Load Supply Current
NSTBY = H (reg.)
(VDD1 and VDD2 current, boost off)
EN_BOOST = L (reg.)
SCK, SS, SI, NRST = H
1
5
µA
170
250
µA
Full Load Supply Current
(VDD1 and VDD2 current, boost on)
NSTBY = H (reg.)
EN_BOOST = H (reg.)
SCK, SS, SI, NRST = H
All Outputs Active
1
mA
IDD_IO
VDD_IO Standby Supply Current
NSTBY = L (reg.)
SCK, SS, SI, NRST = H
1
µA
VREF
VDD_IO Supply Current
Reference Voltage (Note 13)
1 MHz SCK Frequency
CL = 50 pF at SO Pin
I (VREF) ≤ 1 nA,
Test Purposes Only
20
µA
1.205
1.23
1.255
V
−2
+2
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins (GND1-3, GND_BOOST, GND_RGB).
Note 3: Battery/Charger voltage should be above 6V no more than 10% of the operational lifetime.
Note 4: Voltage tolerance of LP3931 above 6.0V relies on fact that VDD1 and VDD2 (2.775V) are available (ON) at all conditions. If VDD1 and VDD2 are not available
(ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device.
Note 5: The total load current of the boost converter should be limited to 300 mA.
Note 6: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160˚C (typ.) and disengages at TJ =
140˚C (typ.).
Note 7: For detailed package and soldering specifications and information, please refer to National Semiconductor Application Note 1187: Leadless Leadframe
Package (LLP).
Note 8: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7.
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