DS90LV011A Datasheet, PDF (4/6 Pages) National Semiconductor (TI) – 3V LVDS Single High Speed Differential Driver

Parameter Measurement Information (Continued)
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FIGURE 4. Differential Driver Propagation Delay and Transition Time Waveforms
Application Information
TABLE 1. Device Pin Descriptions
Package Pin Number
SOT23
LLP
5
8
4
1
3
3
2
7
1
6
2, 4, 5
Pin Name
Description
TTL IN
OUT+
OUT−
GND
V_DD
NC
LVTTL/LVCMOS driver input pins
Non-inverting driver output pin
Inverting driver output pin
Ground pin
Power supply pin, +3.3V ± 0.3V
No connect
PC Board Considerations:
For PC board considerations for the LLP package, please
refer to application note AN-1187 “Leadless Leadframe
Package.” It is important to note that to optimize signal
integrity (minimize jitter and noise coupling), the LLP thermal
land pad, which is a metal (normally copper) rectangular
region located under the package, should be attached to
ground and match the dimensions of the exposed pad on the
PCB (1:1 ratio).
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