CD4538BC Datasheet, PDF (4/10 Pages) Fairchild Semiconductor – Dual Precision Monostable

AC Electrical Characteristics T_A e 25 C C_L e 50 pF and t_r e t_f e 20 ns unless otherwise specified
Symbol
Parameter
Conditions
Min Typ
Max
Units
t_TLH t_THL Output Transition Time
t_PLH t_PHL Propagation Delay Time
t_WL t_WH
t_RR
Minimum Input Pulse Width
A B or C_D
Minimum Retrigger Time
C_IN
Input Capacitance
V_DD e 5V
V_DD e 10V
V_DD e 15V
Trigger Operation
A or B to Q or Q
V_DD e 5V
V_DD e 10V
V_DD e 15V
Reset Operation
C_D to Q or Q
V_DD e 5V
V_DD e 10V
V_DD e 15V
V_DD e 5V
V_DD e 10V
V_DD e 15V
V_DD e 5V
V_DD e 10V
V_DD e 15V
Pin 2 or 14
Other Inputs
100
200
ns
50
100
ns
40
80
ns
300
600
ns
150
300
ns
100
220
ns
250
500
ns
125
250
ns
95
190
ns
35
70
ns
30
60
ns
25
50
ns
0
ns
0
0
ns
0
ns
10
pF
5
75
pF
PW_OUT
Output Pulse Width (Q or Q)
(Note For Typical Distribution
see Figure 9 )
Pulse Width Match between
Circuits in the Same Package
C_X e 0 1 mF R_X e 100 kX
Operating Conditions
R_X e 100 kX
C_X e 0 002 mF
R_X e 100 kX
C_X e 0 1 mF
R_X e 100 kX
C_X e 10 0 mF
R_X e 100 kX
C_X e 0 1 mF
V_DD e 5V
208
226
244
ms
V_DD e 10V 211
230
248
ms
V_DD e 15V 216
235
254
ms
V_DD e 5V
8 83 9 60
10 37
ms
V_DD e 10V 9 02 9 80
10 59
ms
V_DD e 15V 9 20 10 00
10 80
ms
V_DD e 5V
0 87 0 95
1 03
s
V_DD e 10V 0 89 0 97
1 05
s
V_DD e 15V 0 91 0 99
1 07
s
V_DD e 5V
g1
%
V_DD e 10V
g1
%
V_DD e 15V
g1
%
R_X
External Timing Resistance
C_X
External Timing Capacitance
50
kX
0
No Limit
pF
AC parameters are guaranteed by DC correlated testing
The maximum usable resistance R_X is a function of the leakage of the Capacitor C_X leakage of the CD4538B and leakage due to board layout surface
resistance etc
Logic Diagram
FIGURE 1
4
TL F 6000 – 3