CD4023M Datasheet, PDF (4/6 Pages) National Semiconductor (TI) – Triple 3-Input NAND(NOR) Gate

AC Electrical Characteristics T_A e 25 C C_L e 15 pF and input rise and fall times e 20 ns Typical
temperature coefficient for all values of V_DD e 0 3% C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CD4025M
t_PHL
t_PLH
t_THL
t_TLH
C_I
CD4025C
Propagation Delay Time
High to Low Level
Propagation Delay Time
Low to High Level
Transition Time
High to Low Level
Transition Time
Low to High Level
Input Capacitance
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
Any Input
35
50
ns
25
40
ns
35
40
ns
25
70
ns
65
125
ns
35
70
ns
65
175
ns
35
75
ns
50
pF
t_PHL
t_PLH
t_THL
t_TLH
C_I
CD4023M
Propagation Delay Time
High to Low Level
Propagation Delay Time
Low to High Level
Transition Time
High to Low Level
Transition Time
Low to High Level
Input Capacitance
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
Any Input
35
80
ns
25
55
ns
35
120
ns
25
65
ns
65
200
ns
35
115
ns
65
300
ns
35
125
ns
50
pF
t_PHL
t_PLH
t_THL
t_TLH
C_I
CD4023C
Propagation Delay Time
High to Low Level
Propagation Delay Time
Low to High Level
Transition Time
High to Low Level
Transition Time
Low to High Level
Input Capacitance
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
V_DD e 5 0V
V_DD e 10V
Any Input
50
75
ns
25
40
ns
50
75
ns
25
40
ns
75
125
ns
50
75
ns
75
100
ns
40
60
ns
50
pF
t_PHL
Propagation Delay Time
V_DD e 5 0V
High to Low Level
V_DD e 10V
t_PLH
Propagation Delay Time
V_DD e 5 0V
Low to High Level
V_DD e 10V
t_THL
Transition Time
High to Low Level
V_DD e 5 0V
V_DD e 10V
t_TLH
Transition Time
Low to High Level
V_DD e 5 0V
V_DD e 10V
C_I
Input Capacitance
Any Input
50
100
ns
25
50
ns
50
100
ns
25
50
ns
75
150
ns
50
100
ns
75
125
ns
40
75
ns
50
pF
AC Parameters are guaranteed by DC correlated testing
4