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THS4504 Datasheet, PDF (30/45 Pages) National Semiconductor (TI) – WIDEBAND, LOW-DISTORTION, FULLY DIFFERENTIAL AMPLIFIERS
THS4504
THS4505
SLOS363D – AUGUST 2002 – REVISED MAY 2008 ......................................................................................................................................................... www.ti.com
POWER DISSIPATION AND THERMAL
CONSIDERATIONS
The THS4500 family of devices does not incorporate
automatic thermal shutoff protection, so the designer
must take care to ensure that the design does not
violate the absolute maximum junction temperature of
the device. Failure may result if the absolute
maximum junction temperature of +150°C is
exceeded. For best performance, design for a
maximum junction temperature of +125°C. Between
+125°C and +150°C, damage does not occur, but the
performance of the amplifier begins to degrade.
The thermal characteristics of the device are dictated
by the package and the PC board. Maximum power
dissipation for a given package can be calculated
using the following formula.
PDmax =
Tmax - TA
qJA
(28)
Where:
PDmax is the maximum power dissipation in the
amplifier (W).
TMAX is the absolute maximum junction
temperature (°C).
TA is the ambient temperature (°C).
θJA = θJC + θCA
θJC is the thermal coefficient from the silicon
junctions to the case (°C/W).
θCA is the thermal coefficient from the case to
ambient air (°C/w).
For systems where heat dissipation is more critical,
the THS4500 family of devices is offered in an
MSOP-8 with PowerPAD. The thermal coefficient for
the MSOP PowerPAD package is substantially
improved over the traditional SOIC. Maximum power
dissipation levels are depicted in the graph for the
two packages. The data for the DGN package
assumes a board layout that follows the PowerPAD
layout guidelines referenced above and detailed in
the PowerPAD application notes in the Additional
Reference Materialsection at the end of the data
sheet.
3.5
8-Pin DGN Package
3
2.5
2
8-Pin D Package
1.5
1
0.5
0
−40 −20 0
20 40 60 80
TA − Ambient Temperature − °C
θJA = 170°C/W for 8-Pin SOIC (D)
θJA = 58.4°C/W for 8-Pin MSOP (DGN)
ΤJ = 150°C, No Airflow
Figure 91. Maximum Power Dissipation vs
Ambient Temperature
When determining whether or not the device satisfies
the maximum power dissipation requirement, it is
important to not only consider quiescent power
dissipation, but also dynamic power dissipation. Often
times, this is difficult to quantify because the signal
pattern is inconsistent, but an estimate of the RMS
power dissipation can provide visibility into a possible
problem.
DRIVING CAPACITIVE LOADS
High-speed amplifiers are typically not well-suited for
driving large capacitive loads. If necessary, however,
the load capacitance should be isolated by two
isolation resistors in series with the output. The
requisite isolation resistor size depends on the value
of the capacitance, but 10 Ω to 25 Ω is a good place
to begin the optimization process. Larger isolation
resistors decrease the amount of peaking in the
frequency response induced by the capacitive load,
but this comes at the expense of larger voltage drop
across the resistors, increasing the output swing
requirements of the system.
RF
RS
RG
VS
RISO
+
VS
-
RT
+
CL
-
RISO
-VS
RISO = 10 - 25 W
RF
RG
Figure 92. Use of Isolation Resistors with a
Capacitive Load
30
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