THS4504 Datasheet, PDF (29/45 Pages) National Semiconductor (TI) – WIDEBAND, LOW-DISTORTION, FULLY DIFFERENTIAL AMPLIFIERS

THS4504
THS4505
www.ti.com ......................................................................................................................................................... SLOS363D – AUGUST 2002 – REVISED MAY 2008
PowerPAD DESIGN CONSIDERATIONS
The THS4500 family is available in a
thermally-enhanced PowerPAD family of packages.
These packages are constructed using a downset
leadframe upon which the die is mounted [see
Figure 89(a) and Figure 89(b)]. This arrangement
results in the lead frame being exposed as a thermal
pad on the underside of the package [see
Figure 89(c)]. Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad.
The PowerPAD package allows for both assembly
and thermal management in one manufacturing
operation. During the surface-mount solder operation
(when the leads are being soldered), the thermal pad
can also be soldered to a copper area underneath the
package. Through the use of thermal paths within this
copper area, heat can be conducted away from the
package into either a ground plane or other heat
dissipating device.
The PowerPAD package represents a breakthrough
in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward
mechanical methods of heatsinking.
DIE
Side View (a)
DIE
End View (b)
Thermal
Pad
Bottom View (c)
Figure 89. Views of Thermally Enhanced Package
Although there are many ways to properly heatsink
the PowerPAD package, the following steps illustrate
the recommended approach.
Pin 1
0.205
0.060
0.013
0.017
PowerPAD PCB LAYOUT CONSIDERATIONS
1. Prepare the PCB with a top side etch pattern as
shown in Figure 90. There should be etch for the
leads as well as etch for the thermal pad.
2. Place five holes in the area of the thermal pad.
These holes should be 13 mils in diameter. Keep
them small so that solder wicking through the
holes is not a problem during reflow.
3. Additional vias may be placed anywhere along
the thermal plane outside of the thermal pad
area. This helps dissipate the heat generated by
the THS4500 family IC. These additional vias
may be larger than the 13-mil diameter vias
directly under the thermal pad. They can be
larger because they are not in the thermal pad
area to be soldered so that wicking is not a
problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground
plane, do not use the typical web or spoke via
connection methodology. Web connections have
a high thermal resistance connection that is
useful for slowing the heat transfer during
soldering operations. This makes the soldering of
vias that have plane connections easier. In this
application, however, low thermal resistance is
desired for the most efficient heat transfer.
Therefore, the holes under the THS4500 family
PowerPAD package should make their
connection to the internal ground plane with a
complete connection around the entire
circumference of the plated-through hole.
6. The top-side solder mask should leave the
terminals of the package and the thermal pad
area with its five holes exposed. The bottom-side
solder mask should cover the five holes of the
thermal pad area. This prevents solder from
being pulled away from the thermal pad area
during the reflow process.
7. Apply solder paste to the exposed thermal pad
area and all of the IC terminals.
8. With these preparatory steps in place, the IC is
simply placed in position and run through the
solder reflow operation as any standard
surface-mount component. This results in a part
that is properly installed.
0.030
0.075
0.025 0.094
0.010
vias
0.035
Top View
0.040
Figure 90. View of Thermally Enhanced Package
Copyright © 2002–2008, Texas Instruments Incorporated
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