|
LP3470 Datasheet, PDF (3/8 Pages) National Semiconductor (TI) – Tiny Power On Reset Circuit | |||
|
◁ |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VCC Voltage
Reset Voltage
Output Current (Reset)
Operating Temperature Range
LP3470
â0.3V to +6V
â0.3V to +6V
10 mA
â20ËC to +85ËC
LP3470I
Junction Temperature (TJmax)
Power Dissipation (TA = 25ËC) (Note
2)
θJA (Note 2)
Storage Temp. Range
Lead Temp. (Soldering, 5 sec)
ESD Rating (Note 3)
â40ËC to +85ËC
125ËC
300 mW
280ËC/W
â65ËC to +150ËC
260ËC
2 kV
Electrical Characteristics
Limits in standard typeface are for TJ = 25ËC, and limits in boldface type apply over the full operating temperature range, un-
less otherwise specified. VCC = +2.4V to +5.0V unless otherwise noted.
Typ Min Max
Symbol
Parameter
Conditions
(Note (Note (Note Units
4)
5)
5)
VCC
ICC
VRTH
Operating Voltage Range
VCC Supply Current
Reset Threshold Voltage (Note 6)
VCC = 4.5V
LP3470
0.5 5.5
V
16
30 µA
VRTH
0.99
VRTH
0.99
1.01
VRTH
1.01
LP3470I
VRTH VRTH
V
VRTH 0.99 1.01
VRTH VRTH
0.985 1.015
VHYST
tPD
tRP
VOL
Hysteresis Voltage (Note 7)
VCC to Reset Delay
Reset Timeout Period (Note 8)
Reset Output Voltage Low
R1
ILEAK
External Pull-up Resistor
Reset Output Leakage Current
VCC falling at 1 mV/µs
C1 = 1 nF
VCC = 0.5V; IOL = 30 µA
VCC = 1.0V; IOL = 100 µA
VCC =VRTH â100 mV; IOL = 4 mA
VRTH VRTH
35 15 65 mV
100
300 µs
2
1.0 3.5 ms
0.1
0.1
V
0.4
20 0.68 68 kâ¦
0.15
1
µA
6
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its operating conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (Maximum Junction Temperature), θJA (Junction to
Ambient Thermal Resistance), and TA (Ambient Temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax â TA)/ θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The Human Body Model is a 100 pF capacitor discharged through a 1.5 k⦠resistor into each pin.
Note 4: Typical numbers are at 25ËC and represent the most likely parametric norm.
Note 5: Min. and Max. limits in standard typeface are 100% production tested at 25ËC. Min. and Max. limits in boldface are guaranteed through correlation using
Statistical Quality Control (SQC) methods. The limits are used to calculate Nationalâs Average Outgoing Quality Level (AOQL).
Note 6: Factory-trimmed reset thresholds are available in 50 mV increments from 2.4V to 5.0V. Contact your National Semiconductor representative.
Note 7: VHYST affects the relation between VCC and Reset as shown in the timing diagram.
Note 8: tRP is programmable by varying the value of the external capacitor (C1) connected to pin SRT. The equation is: tRP = 2000 x C1 (C1 in µF and tRP in ms).
3
www.national.com
|
▷ |